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DS26401 Datasheet(PDF) 162 Page - Dallas Semiconductor

Part # DS26401
Description  Octal T1/E1/J1 Framer
PDF  309 Pages
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Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS26401 Datasheet(HTML) 162 Page - Dallas Semiconductor

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DS26401 Octal T1/E1/J1 Framer
162
10.6 H.100 (CT Bus) Compatibility
The H.100 (or CT Bus) is a synchronous, bit-serial, TDM transport bus operating at 8.192MHz. The H.100 standard
also allows compatibility modes to operate at 2.048MHz, 4.096MHz, or 8.192MHz. The control bit H100EN
(RIOCR.5), when combined with RSYNCINV and TSSYNCINV allows the DS26401 to accept the CT-Bus
compatible frame sync signal (/CT_FRAME) at the RSYNC and TSSYNC inputs. The following rules apply to the
H100EN control bit:
1) The H100EN bit controls the sampling point for the RSYNC (input mode) and TSSYNC only (the RSYNC output
and other sync signals are not affected).
2) The H100EN bit would always be used in conjunction with the receive and transmit elastic store buffers.
3) The H100EN bit would typically be used with 8.192MHz IBO mode (Section 8.21), but could also be used with
4.096MHz IBO mode or 2.048MHz backplane operation.
4) The H100EN bit in RIOCR controls both RSYNC and TSSYNC (i.e., there is no separate control bit for the
TSSYNC).
5) The H100EN bit does not invert the expected signal, RSYNCINV (RIOCR) and TSSYNCINV (TIOCR) must be
set ‘high’ to invert the inbound sync signals.
Figure 10-1. RSYNC Input in H.100 (CT Bus) Mode
Bit 8
Bit 1
Bit 2
RSYNC1
RSYNC2
RSYSCLK
RSER
t
bc
3
NOTE 1: RSYNC INPUT MODE IN NORMAL OPERATION.
NOTE 2: RSYNC INPUT MODE, H100EN = 1 and RSYNCINV = 1.
NOTE 3: tbc (BIT-CELL TIME) = 122ns (typ). tbc = 244ns or 488ns ALSO ACCEPTABLE.



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