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HT45F39 Datasheet(PDF) 14 Page - Holtek Semiconductor Inc |
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HT45F39 Datasheet(HTML) 14 Page - Holtek Semiconductor Inc |
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14 / 102 page ![]() Rev. 1.10 14 July 01, 2016 Rev. 1.10 15 July 01, 2016 HT45F39/HT45F391 Ultrasonic Distance Measurement 8-bit Flash MCU HT45F39/HT45F391 Ultrasonic Distance Measurement 8-bit Flash MCU System Architecture Akeyfactorinthehigh-performancefeaturesoftheHoltekrangeofmicrocontrollersisattributed totheinternalsystemarchitecture.Therangeofdevicestakeadvantageoftheusualfeaturesfound withinRISCmicrocontrollersprovidingincreasedspeedofoperationandenhancedperformance. Thepipeliningschemeisimplementedinsuchawaythatinstructionfetchingandinstruction executionareoverlapped,henceinstructionsareeffectivelyexecutedinonecycle,withthe exceptionofbranchorcallinstructions.An8-bitwideALUisusedinpracticallyalloperations oftheinstructionset.Itcarriesoutarithmeticoperations,logicoperations,rotation,increment, decrement,branchdecisions,etc.Theinternaldatapathissimplifiedbymovingdatathroughthe AccumulatorandtheALU.CertaininternalregistersareimplementedintheDataMemoryand canbedirectlyorindirectlyaddressed.Thesimpleaddressingmethodsoftheseregistersalong withadditionalarchitecturalfeaturesensurethataminimumofexternalcomponentsisrequired toprovideafunctionalI/OandA/Dcontrolsystemwithmaximumreliabilityandflexibility.This makesthedevicessuitableforlow-cost,high-volumeproductionforcontrollerapplications. Clocking and Pipelining Themainsystemclock,derivedfromRCoscillatorissubdividedintofourinternallygenerated non-overlappingclocks,T1~T4.TheProgramCounterisincrementedatthebeginningoftheT1 clockduringwhichtimeanewinstructionisfetched.TheremainingT2~T4clockscarryoutthe decodingandexecutionfunctions.Inthisway,oneT1~T4clockcycleformsoneinstructioncycle. Althoughthefetchingandexecutionofinstructionstakesplaceinconsecutiveinstructioncycles,the pipeliningstructureofthemicrocontrollerensuresthatinstructionsareeffectivelyexecutedinone instructioncycle.TheexceptiontothisareinstructionswherethecontentsoftheProgramCounter arechanged,suchassubroutinecallsorjumps,inwhichcasetheinstructionwilltakeonemore instructioncycletoexecute. Forinstructionsinvolvingbranches,suchasjumporcallinstructions,twoinstructioncyclesare requiredtocompleteinstructionexecution.Anextracycleisrequiredastheprogramtakesone cycletofirstobtaintheactualjumporcalladdressandthenanothercycletoactuallyexecutethe branch.Therequirementforthisextracycleshouldbetakenintoaccountbyprogrammersintiming sensitiveapplications. Fe tc h In st . ( PC ) Ex ec ut e In st . (P C- 1) Fe tc h In st . ( PC +1 ) Ex ec ut e In st . (P C) Fe tc h In s t. (P C+ 2) Ex ec ut e In st . (P C+ 1) PC PC +1 PC +2 O sci ll at or C lo ck (S yst em C lo ck) P has e Cl o ck T 1 Pr og ra m C oun te r P has e Cl o ck T 2 P has e Cl o ck T 3 P has e Cl o ck T 4 Pi pel in in g System Clocking and Pipelining |
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