AD9625 datasheet(57/74 Pages) AD

57 / 74 page

Data Sheet

AD9625

Rev. C | Page 55 of 72

Table 32. Data Path Customer Offset Register, Address 0x010 (Default = 0x00)

Bit No.

Access

Bit Description

[7:6]

Unused.

[5:0]

Digital datapath offset. Twos complement offset adjustment aligned with least converter resolution.

011111: +31.

011110: +30.

…

000001: +1.

000000: 0.

111111: −1.

…

100001: −31.

100000: −32.

Table 33. Output Mode Register, Address 0x014 (Default = 0x01)

Bit No.

Access

Bit Description

[7:5]

Unused.

Chip output disable. Bit 4 enables and disables the digital outputs from the ADC.

0: enable.

1: disable.

Unused.

Digital ADC sample invert.

0: ADC sample data is not inverted.

1: ADC sample data is inverted.

[1:0]

Digital ADC data format select (DFS). Note that the use of the muxed SDIO pin to control Register 0x014[1:0] is not

supported on the AD9625.

00: offset binary.

01: twos complement (default).

10: reserved.

11: reserved.

Table 34. Serializer Output Adjust, Register, Address 0x015 (Default = 0x54)

Bit No.

Access

Bit Description

Serializer output polarity selection.

0: normal, not inverted.

1: output driver polarity inverted.

[6:5]

Serializer output emphasis amplitude control.

00: 0 mV de-emphasis differential peak to peak.

01: 160 mV de-emphasis differential peak to peak.

10: 80 mV de-emphasis differential peak to peak.

11: 40 mV de-emphasis differential peak to peak.

[4:0]

Reserved.

Table 35. User Test Pattern 1 LSB Register, Address 0x019 (Default = 0x00)

Bit No.

Access

Bit Description

[7:0]

User Test Pattern 1 least significant byte. Note that these bits are used only when Register 0x00D, Bits[3:0] is in user

input mode (Register 0x00D[3:0] = 1000), or when Register 0x061, Bits[3:0] is in the scrambler or 10-bit test modes

(Register 0x061[3:0] = 0100 to 0111). Otherwise, these bits are ignored.

Table 36. User Test Pattern 1 MSB Register, Address 0x01A (Default = 0x00)

Bit No.

Access

Bit Description

[7:0]

User Test Pattern 1 most significant byte. Note that these bits are used only when Register 0x00D, Bits[3:0] is in user

input mode (Register 0x00D[3:0] = 1000). Otherwise, these bits are ignored.

AD9625 Datasheet(PDF) 57 Page - Analog Devices

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