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AD9625 Datasheet(PDF) 71 Page - Analog Devices |
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AD9625 Datasheet(HTML) 71 Page - Analog Devices |
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71 / 74 page ![]() Data Sheet AD9625 Rev. C | Page 69 of 72 Table 107. Trim Setting Control Register, Address 0x121 (Default = 0x00 for AD9625-2.5 and AD9625-2.6; Default = 0x03 for AD9625-2.0) Bit No. Access Bit Description [7:2] Reserved. [1:0] RW Select trim setting, based on sample rate (AD9625-2.0 and AD9625-2.5): 00: Trim 0: for 2.5 GSPS encode rate (default for AD9625-2.5) (not available for AD9625-2.0). 01: Trim 1: for 2.4 GSPS to 2.5 GSPS encode rate (not available for AD9625-2.0). 10: Trim 2: for 2.2 GSPS to 2.4 GSPS encode rate (not available for AD9625-2.0). 11: Trim 3: for 330 MSPS to 2.2 GSPS encode rate (default for AD9625-2.0). Select trim setting, based on sample rate (AD9625-2.6): 00: Trim 0: for 2.55 GSPS to 2.6 GSPS encode rate (default for AD9625-2.6). 01: Trim 1: for 2.4 GSPS to 2.55 GSPS encode rate. 10: Trim 2: for 2.2 GSPS to 2.4 GSPS encode rate. 11: Trim 3: for 330 MSPS to 2.2 GSPS encode rate. Table 108. Unused Register, Address 0x12A (Default = 0x05) Bit No. Access Bit Description [7:0] RW Reserved; maintain default setting of 0x05. Table 109. DDC 0 Gain Control Register, Address 0x130 (Default = 0x00) Bit No. Access Bit Description [7:6] Unused. [5:4] RW DDC 0 polyphase (decimate by 2) gain in units of 6 dB. 00: 0 dB gain. 01: 6 dB gain. 10: 12 dB gain. 11: 18 dB gain. [3:2] Unused. [1:0] RW DDC 0 polyphase (decimate by 8) gain in units of 6 dB. 00: 0 dB gain. 01: 6 dB gain. 10: 12 dB gain. 11: 18 dB gain. Table 110. DDC 0 Phase Increment Least Significant Bits Register, Address 0x131 (Default = 0x00) Bit No. Access Bit Description [7:0] RW DDC 0 NCO phase increment value. Phase increment for the NCO within DDC 0 (Bits[7:0]). The output frequency = (decimal(Register 0x132[1:0]; Register 0x131[7:0]) × fS)/1024. Table 111. DDC 0 Phase Increment Most Significant Bits Register, Address 0x132 (Default = 0x00) Bit No. Access Bit Description [7:2] Unused. [1:0] RW DDC 0 NCO phase increment value. Phase increment for the NCO within DDC 0 (Bits[9:8]). Table 112. DDC 1 Gain Control Register, Address 0x138 (Default = 0x00) Bit No. Access Bit Description [7:6] Unused. [5:4] RW DDC 1 polyphase (decimate by 2) gain in units of 6 dB. 00: 0 dB gain. 01: 6 dB gain. 10: 12 dB gain. 11: 18 dB gain. [3:2] Unused. |
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