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PCI9080 Datasheet(PDF) 32 Page - List of Unclassifed Manufacturers |
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PCI9080 Datasheet(HTML) 32 Page - List of Unclassifed Manufacturers |
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32 / 133 page ![]() SECTION 3 PCI 9080 FUNCTIONAL DESCRIPTION © ©PLX Technology, Inc., 1997 Page 24 Version 0.93 3.6.2 Chaining Mode DMA Chaining DMA operates as follows: The Host Processor or the Local Processor sets up descriptor blocks in local or host memory that are composed of a PCI address, local address, transfer count, transfer direction and address of the next descriptor block. The Host or Local Processor then sets up the address of the initial descriptor block in the descriptor pointer register of the PCI 9080 and initiates the transfer by setting a control bit. The PCI 9080 loads the first descriptor block and initiates the data transfer. The PCI 9080 continues to load descriptor blocks and transfer data until it detects the end of chain bit is set in the next descriptor pointer register. The PCI 9080 can be programmed to interrupt the local processor by setting the "Interrupt after Terminal Count" bit or PCI host upon completion of each block transfer and after all block transfers are complete (done) (refer to Figure 3-8). If the chaining descriptors are located in local memory, the DMA controller can be programmed to clear the transfer size at the completion of each DMA. (Refer to "DMA Clear Count Mode"). Note: The DMA descriptor can be on the local memory or PCI memory, or both (first descriptor on local memory, and second descriptor on PCI memory). Set up First Descriptor Pointer Register (First only requires Descriptor Pointer) First PCI Address First Memory Block to Transfer First Memory Block to Transfer Next Memory Block to Transfer Next Memory Block to Transfer Local or Host Memory PCI Host Memory Mode Register Set DMA Mode to Chaining Command/Status Register Set the Enable and Go bits in the DMA Command/Status Register to Initate DMA Transfer First Local Address First Transfer Size (byte count) Next Descriptor Pointer Descriptor Pointer Register PCI Address Local Address Transfer Size (byte count) Next Descriptor Pointer End of Chain Specification Bit Figure 3-8. Chaining DMA Initialization |
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