PCI9080 datasheet(14/133 Pages) ETC

14 / 133 page

SECTION 2

PCI 9080

BUS OPERATION

©PLX Technology, Inc., 1997

Page 6

Version 0.93

2. BUS OPERATION

2.1 PCI BUS CYCLES

The PCI 9080 is compliant with PCI Specification v2.1.

Refer to the PCI 2.1 spec for any specific features of

PCI Bus.

2.1.1 PCI Target Command Codes

As a target, the PCI 9080 allows access to the PCI 9080

internal registers and the local bus, using the commands

listed in Table 2-1.

Table 2-1. PCI Target Command Codes

Command Type

Code (C/BE[3:0]#)

I/O Read

0010 (2h)

I/O Write

0011 (3h)

Memory Read

0110 (6h)

Memory Write

0111 (7h)

Memory Read Multiple

1100 (Ch)

Memory Read Line

1110 (Eh)

Memory Write and Invalidate

1111 (Fh)

Configuration Read

1010 (Ah)

Configuration Write

1011 (Bh)

All read or write accesses to the PCI 9080 can be byte,

word or long word accesses. All memory commands are

aliased to the basic memory commands. All I/O

accesses to the PCI 9080 are decoded to a long word

boundary. The byte enables are used to determine

which bytes are read or written. An I/O access with

illegal byte enable combinations is terminated with a

Target Abort.

2.1.2 PCI Master Command Codes

The PCI 9080 can access the PCI bus to perform

DMA transfers or Direct Master Local to PCI Bus

transfers. During the Direct master or DMA transfer, the

command code assigned to the PCI 9080 internal

be used as the PCI command code.

2.1.2.1 DMA Master Command Codes

The DMA controllers of the PCI 9080 can generate the

memory cycles listed in Table 2-2.

Table 2-2. DMA Master Command Codes

Command Type

Code (C/BE[3:0]#)

Memory Read

0110 (6h)

Memory Write

0111 (7h)

Memory Read Multiple

1100 (Ch)

Memory Read Line

1110 (Eh)

Memory Write and Invalidate

1111 (Fh)

2.1.2.2 Direct

Local

PCI

Command

Codes

For direct local to PCI bus accesses, the PCI 9080 can

generate the cycles listed in Table 2-3 through Table 2-

Table 2-3. Local to PCI Memory Access

Command Type

Code (C/BE[3:0]#)

Memory Read

0110 (6h)

Memory Write

0111 (7h)

Memory Read Multiple

1100 (Ch)

Memory Read Line

1110 (Eh)

Table 2-4. Local to PCI I/O Access

Command Type

Code (C/BE[3:0]#)

I/O Read

0010 (2h)

I/O Write

0011 (3h)

Table 2-5. Local to PCI Configuration Access

Command Type

Code (C/BE[3:0]#)

Configuration Memory Read

1010 (Ah)

Configuration Memory Write

1011 (Bh)

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