PCI9080 datasheet(59/133 Pages) ETC

59 / 133 page

SECTION 4

PCI 9080

REGISTERS

©PLX Technology, Inc., 1997

Page 51

Version 0.93

4.3.7 (PCIHTR; PCI:0Eh, LOC:0Eh) PCI Header Type Register

Table 4-17. (PCIHTR; PCI:0Eh, LOC:0Eh) PCI Header Type Register

Field

Description

Read

Write

Value after Reset

6:0

Configuration Layout Type. Specifies the layout of bits 10h through 3Fh in

configuration space. Only one encoding 0 is defined. All other encodings are reserved.

Yes

Local

Header Type. A value of 1 indicates multiple functions. A value of 0 indicates a single

function.

Yes

Local

4.3.8 (PCIBISTR; PCI:0Fh, LOC:0Fh) PCI Built-In Self Test (BIST) Register

Table 4-18. (PCIBISTR; PCI:0Fh, LOC:0Fh) PCI Built-In Self Test (BIST) Register

Field

Description

Read

Write

Value after Reset

3:0

A value of 0 indicates the device passed its test. Nonzero values indicate the device

failed. Device specific failure codes can be encoded in the nonzero value.

Yes

Local

5:4

Reserved. Device returns 0.

Yes

PCI writes a 1 to invoke BIST. Generates an interrupt to local bus. Local bus resets

the bit when BIST is complete. Software should fail device if BIST is not complete

after 2 seconds.

Refer to Runtime registers for interrupt control/status.

Yes

Returns 1 if the device supports BIST. Returns 0 if the device is not BIST compatible.

Yes

Local

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