AD5758 datasheet(31/72 Pages) AD

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Data Sheet

AD5758

Rev. 0 | Page 31 of 72

THEORY OF OPERATION

The AD5758 is a single-channel, precision voltage and current

output DAC, designed to meet the requirements of industrial

factory automation and process control applications. It provides a

high precision, fully integrated, single-chip solution for generat-

ing a unipolar/bipolar current or voltage output. Package power

dissipation is minimized by incorporating on-chip DPC, which

is achieved by regulating the supply voltage (VDPC+) to the VIOUT

output driver from 4.95 V to 27 V using a buck dc-to-dc converter,

optimized for minimum on-chip power dissipation. The AD5758

consists of a two die solution with the dc-to-dc converter

circuitry and the VIOUT fault protection switch located on the

dc-to-dc die, and the remaining circuitry on the main die.

Interdie communication is performed over an internal 3-wire

interface.

DAC ARCHITECTURE

The DAC core architecture of the AD5758 consists of a voltage

mode R-2R ladder network. The voltage output of the DAC core

is either converted to a current or voltage output at the VIOUT pin.

Only one mode can be enabled at any one time. Both the voltage

and current output stages are supplied by the VDPC+ power rail

(internally generated from AVDD1) and the AVSS rail.

Current Output Mode

If current output mode is enabled, the voltage output from the

DAC is converted to a current (see Figure 74), which is then

mirrored to the supply rail so that the application only sees a

current source output.

The current ranges available are 0 mA to 20 mA, 0 mA to 24 mA,

4 mA to 20 mA, ±20 mA, ±24 mA, and −1 mA to +22 mA. An

internal or external 13.7 kΩ RSET resistor can be used for the

voltage to current conversion.

VIOUT

RSET

VSS

VDPC+

IOUT

OPEN FAULT

16-BIT

DAC

Figure 74. Voltage to Current Conversion Circuitry

Voltage Output Mode

If voltage output mode is enabled, the voltage output from the

DAC is buffered and scaled to output a software-selectable

unipolar or bipolar voltage range (see Figure 75).

The voltage ranges available are 0 V to 5 V, ±5 V, 0 V to 10 V,

and ±10 V. A 20% overrange feature is also available via the DAC_

CONFIG register, as well as the facility to negatively offset the

unipolar voltage ranges via the GP_CONFIG1 register (see the

General-Purpose Configuration 1 Register section).

RANGE

SCALING

DAC

VOUT SHORT FAULT

+VSENSE

–VSENSE

VIOUT

Figure 75. Voltage Output

Reference

The AD5758 can operate with either an external or internal

reference. The reference input requires a 2.5 V reference for

specified performance. This input voltage is then internally

buffered before it is applied to the DAC.

The AD5758 contains an integrated buffered 2.5 V voltage

reference that is externally available for use elsewhere within the

system. The internal reference drives the integrated 12-bit ADC.

REFOUT must be connected to REFIN to use the internal

reference to drive the DAC.

SERIAL INTERFACE

The AD5758 is controlled over a versatile 4-wire serial interface

that operates at clock rates of up to 50 MHz and is compatible

with SPI, QSPI, MICROWIRE, and DSP standards. Data coding

is always straight binary.

Input Shift Register

With SPI CRC enabled (default state), the input shift register is

32 bits wide. Data is loaded into the device MSB first as a 32-bit

word under the control of a serial clock input, SCLK. Data is

clocked in on the falling edge of SCLK. If CRC is disabled, the

serial interface is reduced to 24 bits; a 32-bit frame is still

accepted but the last 8 bits are ignored. See the Register Map

section for full details on the registers that can be addressed via

the SPI interface.

Table 7. Writing to a Register (CRC enabled)

MSB

LSB

D31

[D30:D29]

[D28:D24]

[D23:D8]

[D7:D0]

Slip Bit

DUT

address

Data

CRC

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