AD5758 datasheet(42/72 Pages) AD

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AD5758

Data Sheet

Rev. 0 | Page 42 of 72

INTERNAL OSCILLATOR DIAGNOSTICS

An internal frequency monitor uses the internal oscillator (MCLK)

to increment a 16-bit counter at a rate of 1 kHz (MCLK/10,000).

The value of the counter is available to be read in the FREQ_

MONITOR register. The user can poll this register periodically

and use it both as a diagnostic tool for the internal oscillator

(to monitor that the oscillator is running), and to measure the

frequency. This feature is enabled by default via the FREQ_MON_

EN bit in the DIGITAL_DIAG_CONFIG register.

In the event that the internal MCLK oscillator stops, the

AD5758 sends a specific code of 0x07DEAD to the SDO line for

every SPI frame. This feature is enabled by default and can be

disabled by clearing the OSC_STOP_DETECT_EN bit in the

GP_CONFIG1 register. Note that this feature is limited to the

maximum readback timing specifications as outlined in Table 3.

STICKY DIAGNOSTIC RESULTS BITS

The AD5758 contains two diagnostic results registers: digital

and analog (see Table 45 and Table 46, respectively). The diagnostic

result bits contained within these registers are sticky (R/W-1-C),

that is, each bit needs a 1 to be written to it to clear it. A more

appropriate word here is update rather than clear because if the

fault is still present, even after writing a 1 to the bit in question,

it does not clear to 0. Upon writing Logic 1 to the bit, it updates

to its latest value, which is Logic 1 if the fault is still present and

Logic 0 if the fault is no longer present.

There are two exceptions to this R/W-1-C access within the

DIGITAL_DIAG_RESULTS register: CAL_MEMORY_

UNREFRESHED and SLEW_BUSY. These flags automatically

clear when the calibration memory refresh or output slew,

respectively, is complete.

The status register contains a DIG_DIAG_STATUS and

ANA_DIAG_STATUS bit, which is the result of a logical OR of

the diagnostic results bits contained in each of the diagnostic

results registers. All analog diagnostic flag bits are included in

the logical OR of the ANA_DIAG_STATUS bit and all digital

diagnostic flag bits, with the exception of the SLEW_BUSY bit,

are included in the logical OR of the DIG_DIAG_STATUS bit.

The OR’d bits within the status register are read only and not

sticky (R/W-1-C).

BACKGROUND SUPPLY AND TEMPERATURE

MONITORING

Excessive die temperature and overvoltage are known to be related

to common cause failures. These conditions can be monitored

in a continuous fashion using comparators, eliminating the

requirement to poll the ADC.

Both die have a built-in temperature sensor with an accuracy of

typically ±5oC. The main die temperature is monitored by a

comparator. The background temperature comparator is

permanently enabled. Programmable trip points corresponding

to 142°C, 127°C, 112°C, and 97°C can be configured in the

GP_CONFIG1 register. If the temperature of the main die exceeds

the programmed limit, the relevant status bit in the ANALOG_

DIAG_RESULTS register is set and the FAULT pin is asserted low.

The low voltage supplies on the AD5758 are monitored via low

power static comparators. This function is disabled by default

and can be enabled via the COMPARATOR_CONFIG bits in

the GP_CONFIG2 register. Note that the INT_EN bit in the

DAC_CONFIG register must be set for the REFIN buffer to be

powered up and for this node to be available to the REFIN

comparator. The monitored nodes are REFIN, REFOUT, VLDO,

and an internal AVCC voltage node (INT_AVCC). There is a status

bit in the ANALOG_DIAG_RESULTS register corresponding to

each monitored node. If any of the supplies exceed the upper

or lower threshold values (see Table 16), the corresponding

status bit is set. Note that, in the case of a REFOUT fault, the

REFOUT_ERR status bit is set. In this case, the INT_AVCC,

VLDO, and temperature comparator status bits may also become

set because REFOUT is used as the comparison voltage for

these nodes. Like all the other status bits in the ANALOG_

DIAG_RESULTS register, these bits are sticky and need a 1 to

be written to them to clear them, assuming that the error

condition subsided. If the error condition is still present, the

flag remains high, even after a 1 is written to clear it.

Table 16. Comparator Supply Activation Thresholds

Supply

Lower

Threshold (V)

Nominal

Value/Range (V)

Upper

Threshold (V)

INT_AVCC

3.8

4 to 5

5.2

VLDO

2.8

3 to 3.6

3.8

REFIN

2.24

2.5

2.83

REFOUT

2.24

2.5

2.83

OUTPUT FAULT

The AD5758 is equipped with a FAULT pin. This pin is an active

low, open-drain output allowing several AD5758 devices to be

connected together to one pull-up resistor for global fault detection.

This pin is high impedance when no faults are detected and is

asserted low when certain faults are detected, for example, an

open circuit in current mode, a short circuit in voltage mode, a

CRC error, or an overtemperature error. Table 17 shows the fault

conditions that automatically force the FAULT pin active and

highlights the user maskable fault bits available via the FAULT_

PIN_CONFIG register (see Table 43). Note that all registers

contain a corresponding FAULT pin status bit, FAULT_PIN_

STATUS, that mirrors the inverted current state of the FAULT

pin. For example, if the FAULT pin is active, the FAULT_

PIN_STATUS bit is 1.

AD5758 Datasheet(PDF) 42 Page - Analog Devices

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