AD5758 datasheet(40/72 Pages) AD

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AD5758

Data Sheet

Rev. 0 | Page 40 of 72

The 16-bit USER_OFFSET register allows the user to adjust the

offset of the DAC channel by −32,768 LSBs to +32,768 LSBs in

steps of 1 LSB. The USER_OFFSET register coding is straight

binary, as shown in Table 15. The default code in the USER_

OFFSET register is 0x8000, which results in zero offset

programmed to the output.

Table 15. Offset Register Adjustment

Gain Adjustment

D15

D13 to D2

+32,768 LSBs

+32,767 LSBs

…

No Adjustment (Default)

…

−32,767 LSBs

−32,768 LSBs

The value (in decimal) that is written to the internal DAC

)

(









Code

DAC

(1)

where:

is the code loaded to the DAC_INPUT register.

is the code in the USER_GAIN register (default code = 216 − 1).

is the code in the USER_OFFSET register (default code = 215).

Data from the DAC_INPUT register is processed by a digital

multiplier and adder, controlled by the contents of the user gain

and USER_OFFSET registers, respectively. The calibrated DAC

data is then loaded to the DAC, dependent on the state of the

LDAC pin.

Each time data is written to the USER_GAIN or USER_

OFFSET register, the DAC output is not automatically updated.

Instead, the next write to the DAC_INPUT register uses these

user gain and user offset values to perform a new calibration

and automatically updates the channel. The read only DAC_

OUTPUT register represents the value currently available at the

DAC output, except in the case of user gain and user offset

calibration. In this case, the DAC_OUTPUT register represents

the DAC data input by the user, on which the calibration is

performed and not the result of the calibration.

Both the USER_GAIN register and the USER_OFFSET register

have 16 bits of resolution. The correct method to calibrate the

gain and offset is to first calibrate the gain and then calibrate the

offset.

DAC OUTPUT UPDATE AND DATA INTEGRITY

DIAGNOSTICS

Figure 83 shows a simplified version of the DAC input loading

circuitry. If used, the USER_GAIN and USER_OFFSET registers

must be updated before writing to the DAC_INPUT register.

VIOUT

INTERFACE LOGIC

OUTPUT

AMPLIFIER

SDO

SDI

16-BIT

DAC

REFIN

SYNC

LDAC

(HARDWARE OR SOFTWARE)

DAC INPUT

USER

GAIN AND OFFSET

CALIBRATION

SCLK

DAC OUTPUT

(READ ONLY)

CLEAR CODE

CLEAR EVENT

(WDT TIMEOUT)

Figure 83. Simplified Serial Interface of Input Loading Circuitry

AD5758 Datasheet(PDF) 40 Page - Analog Devices

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