AD5758 datasheet(67/72 Pages) AD

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Data Sheet

AD5758

Rev. 0 | Page 67 of 72

Bits

Bit Name

Description

Reset

Access

RESET_OCCURRED

This bit flags that a reset occurred (default on power-up is therefore Logic 1).

0x1

R/W-1-C

ERR_3WI

This bit flags an error in the interdie 3-wire interface communications.

0x0

R/W-1-C

WDT_ERR

This bit flags a WDT fault.

0x0

R/W-1-C

Reserved

Reserved.

0x0

R/W-1-C

3WI_RC_ERR

This bit flags an error if the 3-wire read and compare process is enabled and

a parity error occurs.

0x0

R/W-1-C

DAC_LATCH_MON_ERR

This bit flags if the output of the DAC latches does not match the input.

0x0

R/W-1-C

Reserved

Reserved.

0x0

R/W-1-C

INVERSE_DAC_CHECK_ERR

This bit flags if a fault it detected between the DAC code driven by the digital

core and an inverted copy.

0x0

R/W-1-C

CAL_MEM_CRC_ERR

This bit flags a CRC error for the CRC calculation of the calibration memory

upon refresh.

0x0

R/W-1-C

INVALID_SPI_ACCESS_ERR

This bit flags if an invalid SPI access is attempted, such as writing to or

reading from an invalid or reserved address. This bit also flags if an SPI write

is attempted directly after powering up but before a calibration memory

refresh is performed or if an SPI write is attempted while a calibration

memory refresh is in progress. Performing a two stage readback is permitted

during a calibration memory refresh and does not cause this flag to set.

Attempting to write to a read only register also causes this bit to assert.

0x0

R/W-1-C

Reserved

Reserved.

0x0

R/W-1-C

SCLK_COUNT_ERR

This bit flags an SCLK falling edge count error. 32 clocks are required if SPI

CRC is enabled and 24 clocks or 32 clocks are required if SPI CRC is not enabled.

0x0

R/W-1-C

SLIPBIT_ERR

This bit flags an SPI frame slip bit error, that is, the MSB of the SPI word is not

equal to the inverse of MSB − 1.

0x0

R/W-1-C

SPI_CRC_ERR

This bit flags an SPI CRC error.

0x0

R/W-1-C

Analog Diagnostic Results Register

Address: 0x15, Reset: 0x150000, Name: ANALOG_DIAG_RESULTS

This register contains an error flag corresponding to the four voltage nodes (VLDO, INT_AVCC, REFIN, and REFOUT) monitored in

the background by comparators, as well as a flag for the main die temperature, which is also monitored by a comparator. Voltage output

short circuit, current output open circuit, fault protection switch, and dc-to-dc error flags are also contained in this register. Like the

DIGITAL_DIAG_RESULTS register, all of the flags contained in this register require a 1 to be written to them to update or clear them.

When the corresponding diagnostic features are not enabled, the respective error flags are read as zero.

Table 46. Bit Descriptions for ANALOG_DIAG_RESULTS

Bits

Bit Name

Description

Reset

Access

FAULT_PIN_STATUS

The FAULT_PIN_STATUS bit reflects the inverted current status of the FAULT pin.

0x0

[20:16]

REGISTER_ADDRESS

0x0

[15:14]

Reserved

Reserved.

0x0

FAULT_PROT_SW_ERR

This bit flags if the fault protection switch at the VIOUT pin goes outside of the VDPC+

rail or AVSS rail, irrespective of whether the fault protection switch is currently

open (disabled) or closed (enabled).

0x0

R/W-1-C

Reserved

Reserved.

0x0

R/W-1-C

DCDC_P_SC_ERR

This bit flags a dc-to-dc short-circuit error for the positive rail dc-to-dc circuit.

0x0

R/W-1-C

Reserved

Reserved.

0x0

R/W-1-C

DCDC_P_PWR_ERR

This bit flags a dc-to-dc regulation fault, that is, the dc-to-dc circuitry cannot reach

the target VDPC+ voltage due to an insufficient AVDD1 voltage.

0x0

R/W-1-C

Reserved

Reserved.

0x0

R/W-1-C

IOUT_OC_ERR

This bit flags a current output open circuit error. This error bit is set in the case of a

current output open circuit and in the case where there is insufficient headroom

available to the internal current output driver circuitry to provide the programmed

output current.

0x0

R/W-1-C

VOUT_SC_ERR

This bit flags a voltage output short-circuit error.

0x0

R/W-1-C

Reserved

Reserved.

0x0

R/W-1-C

AD5758 Datasheet(PDF) 67 Page - Analog Devices

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