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AD5758 Datasheet(PDF) 45 Page - Analog Devices

Part # AD5758
Description  Single-Channel, 16-Bit Current and Voltage Output DAC
PDF  72 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5758 Datasheet(HTML) 45 Page - Analog Devices

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Data Sheet
AD5758
Rev. 0 | Page 45 of 72
ADC Configuration
The ADC is configured using the ADC_CONFIG register via
SEQUENCE_COMMAND (Bits[10:8]), SEQUENCE_DATA
(Bits[7:5]), and ADC_IP_SELECT (Bits[4:0]).
Table 19. ADC Configuration Register
D10 to D8
D7 to D5
D4 to D0
Command
Data
ADC input select
The ADC can be set up to monitor a single node of interest or
configured to sequence through up to eight nodes of interest.
The sequential conversions can be initiated automatically after
every valid SPI frame is received by the device (automatic
sequence mode), or in a more controlled manner via a specific
key code written to the key register (key sequence mode). When
a conversion is complete, the ADC result is available in the status
register and, if in sequence mode, the sequencer address is
advanced. If autostatus readback mode is used in conjunction with
either sequence mode, the last completed ADC conversion data is
available on SDO during every SPI frame written to the device.
The sequencer has a maximum channel depth of 8. Each of the
channels in the sequencer must be configured with the select
bits of the required ADC input for that sequencer channel, and
the number of configured channels must equal the depth. If any
active sequencer channel location is not configured correctly, it
stores the previous value loaded to that channel, defaulting
initially to the ADC input option of 0b00000 for all sequencer
channels. If a node from the dc-to-dc die is required to be part
of the ADC sequencer, pe
rform this configuration using the
DCDC_ADC_CONTROL_DIAG bits in the DCDC_CONFIG2
register before configuring the ADC sequencer, to avoid any
3-wire interface related delays between ADC conversions. If
multiple nodes from the dc-to-dc die are required within the
sequence, key sequencing mode must be used rather than
automatic sequencing mode, because the DCDC_ADC_
CONTROL_DIAG bits must be updated between ADC
conversions to configure the next required dc-to-dc die
node required by the sequence.
The four modes of operation are key sequencing, automatic
sequencing, single immediate conversion, and single key
conversion. The sequencing modes are mutually exclusive. If
enabled, the key sequencing mode disables the automatic
sequencing mode, and vice versa.
Key Sequencing (Command 010)
Writing Command 010 enables key sequencing mode.
Sequencing starts with a write to the key register with Key
Code 0x1 ADC, starting on Channel 0 and continuing to
Channel N − 1, where N is the depth, with every 0x1ADC
command. This mode enables user control of the switching of
channels during sequencing because the switch occurs only for
every specific key code command, rather than for every valid
SPI frame, as in the case of automatic sequencing mode. When
the sequence is completed, it starts again with Channel 0 until
disabled. Command 000 and Command 001 must be used to
configure all the required channels before Command 0b010 is
issued to enable key sequencing mode (see Figure 86). If the
sequencing is disabled and later reenabled, the sequencer is
reset to recommence converting on the first channel in the
sequence.
Automatic Sequencing (Command 011)
Sequencing starts on the next valid SPI frame, starting with
Channel 0 and continuing to Channel N − 1, where N is the depth,
on every valid SPI frame. When the sequence is complete, it starts
again with Channel 0 until disabled. As with the key sequencing
mode, Command 000 and Command 001 must be used to
configure all the required channels before Command 011 is issued
to enable automatic sequencing mode (see Figure 86). If the
sequencing is disabled and later reenabled, the sequencer is
reset to recommence converting on the first channel in the
sequence. When reenabled, the channels do not need to be
reconfigured unless the desired list of nodes changes. Use
automatic sequencing in conjunction with the autostatus
readback mode to ensure that the latest ADC result is available.
Single Immediate Conversion (Command 100)
This mode initiates a single conversion on the node currently
selected in the ADC input select bits of the ADC_CONFIG register.
Selecting this command stops any active automatic sequence,
meaning that it must be reenabled if required. The sequencer
does not need to be reconfigured because the configuration of
sequencer depth and channels is stored.
Single Key Conversion (Command 101)
This mode is used to set up an individual ADC input node to be
converted at some future time, initiated by writing the 0x1ADC
key code to the key register.
Sequencing Mode Setup
A list of the relevant ADC sequencer commands are shown in
Table 20 (these are available in the ADC_CONFIG register; see
Table 42). The default depth (000) is equivalent to one diagnostic
channel up to a binary depth value of 111, which is equivalent
to eight channels.
Table 20. Command Bits
Value
Description
000
Set the sequencer depth (0 to 7)
001
Load sequencer Channel N with the selected ADC input
010
Enable/disable key sequencer
011
Enable/disable automatic sequencer
100
Perform a single conversion on the currently selected
ADC input
101
Set up single key conversion, that is, select the ADC mux
input to be used when triggered with a write to the key
register (this is outside of the key sequencing mode)



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