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AD5758 Datasheet(PDF) 61 Page - Analog Devices

Part # AD5758
Description  Single-Channel, 16-Bit Current and Voltage Output DAC
PDF  72 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5758 Datasheet(HTML) 61 Page - Analog Devices

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Data Sheet
AD5758
Rev. 0 | Page 61 of 72
DC-to-DC Configuration 2 Register
Address: 0x0C, Reset: 0x0C0100, Name: DCDC_CONFIG2
This register configures various dc-to-dc die features, such as the dc-to-dc converter current limit and the dc-to-dc die node, to be
multiplexed to the ADC.
Table 39. Bit Descriptions for DCDC_CONFIG2
Bits
Bit Name
Description
Reset
Access
21
FAULT_PIN_STATUS
The FAULT_PIN_STATUS bit reflects the inverted current status of the
FAULT pin.
0x0
R
[20:16]
REGISTER_ADDRESS
Register address.
0x0
R
[15:13]
Reserved
Reserved. Do not alter the default value of these bits.
0x0
R0
12
BUSY_3WI
Three-wire interface busy indicator.
0x0
R
0: 3-wire interface not currently active.
1: 3-wire interface busy.
11
INTR_SAT_3WI
Three-wire interface saturation flag. This flag is set to 1 when the
interrupt detection circuitry is automatically disabled due to six
consecutive interrupt signals. A write to either of the dc-to-dc
configuration registers clears this bit to 0.
0x0
R
10
DCDC_READ_COMP_DIS
Disable 3-wire interface read and compare cycle. This read and compare
cycle ensures that the contents of the copy of the dc-to-dc configuration
registers on the main die match the contents on the dc-to-dc die.
0x0
R/W
0: enable automatic read and compare cycle (default).
1: when set, this bit disables the automatic read and compare cycle
after each 3-wire interface write.
[9:8]
Reserved
Reserved. Do not alter the default value of these bits.
0x1
R/W
7
FAULT_PROT_SW_SHORT_DEGLITCH
Enable short deglitch time on VIOUT fault protection switch error flag.
0x0
R/W
0: deglitch time set to 1.02 ms (default).
1: deglitch time set to 128 us.
6
VIOUT_PULLDOWN_EN
Enable the 30 kΩ resistor to ground on VIOUT.
0x0
R/W
0: disable (default).
1: enable.
[5:4]
DCDC_ADC_CONTROL_DIAG
Select which dc-to-dc die node is multiplexed to the ADC on the
main die.
0x0
R/W
00: AGND on dc-to-dc die.
01: internal 2.5 V supply on dc-to-dc die.
10: AVDD1.
11: reserved (do not select this option).
[3:1]
DCDC_ILIMIT
These three bits set the dc-to-dc converter current limit.
0x0
R/W
000: 150 mA (default).
001: 200 mA.
010: 250 mA.
011: 300 mA.
100: 350 mA.
101: 400 mA.
110: 400 mA.
111: 400 mA.
0
Reserved
Reserved. Do not alter the default value of this bit.
0x0
R/W



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