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AD5758 Datasheet(PDF) 56 Page - Analog Devices

Part # AD5758
Description  Single-Channel, 16-Bit Current and Voltage Output DAC
PDF  72 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5758 Datasheet(HTML) 56 Page - Analog Devices

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AD5758
Data Sheet
Rev. 0 | Page 56 of 72
User Gain Register
Address: 0x04, Reset: 0x04FFFF, Name: USER_GAIN
The 16-bit USER_GAIN register allows the user to adjust the gain of the DAC channel in steps of 1 LSB. The USER_GAIN register coding
is straight binary. The default code is 0xFFFF. In theory, the gain can be tuned across the full range of the output. In practice, the
maximum recommended gain trim is approximately 50% of the programmed range to maintain accuracy.
Table 31. Bit Descriptions for USER_GAIN
Bits
Bit Name
Description
Reset
Access
21
FAULT_PIN_STATUS
The FAULT_PIN_STATUS bit reflects the inverted current status of the FAULT pin.
0x0
R
[20:16]
REGISTER_ADDRESS
Register address.
0x0
R
[15:0]
USER_GAIN
User gain correction code.
0xFFFF
R/W
User Offset Register
Address: 0x05, Reset: 0x058000, Name: USER_OFFSET
The 16-bit USER_OFFSET register allows the user to adjust the offset of the DAC channel by −32,768 LSBs to +32,768 LSBs in steps of 1 LSB.
The USER_OFFSET register coding is straight binary. The default code is 0x8000, which results in zero offset programmed to the output.
Table 32. Bit Descriptions for USER_OFFSET
Bits
Bit Name
Description
Reset
Access
21
FAULT_PIN_STATUS
The FAULT_PIN_STATUS bit reflects the inverted current status of the FAULT pin.
0x0
R
[20:16]
REGISTER_ADDRESS
Register address.
0x0
R
[15:0]
USER_OFFSET
User offset correction code.
0x8000
R/W
DAC Configuration Register
Address: 0x06, Reset: 0x060C00, Name: DAC_CONFIG
This register configures the DAC (range, internal/external RSET, and output enable), enables the output stage circuitry, and configures the
slew rate control function.
Table 33. Bit Descriptions for DAC_CONFIG
Bits
Bit Name
Description
Reset
Access
21
FAULT_PIN_STATUS
The FAULT_PIN_STATUS bit reflects the inverted current status of the FAULT pin.
0x0
R
[20:16]
REGISTER_ADDRESS
Register address.
0x0
R
[15:13]
SR_STEP
Slew rate step. In conjunction with the slew rate clock, the slew rate step defines by
how much the output value changes at each update. Together, both parameters
define the rate of change of the output value.
0x0
R/W
000: 4 LSB (default).
001: 12 LSB.
010: 64 LSB.
011: 120 LSB.
100: 256 LSB.
101: 500 LSB.
110: 1820 LSB.
111: 2048 LSB.



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