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AD5758 Datasheet(PDF) 59 Page - Analog Devices

Part # AD5758
Description  Single-Channel, 16-Bit Current and Voltage Output DAC
PDF  72 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5758 Datasheet(HTML) 59 Page - Analog Devices

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Data Sheet
AD5758
Rev. 0 | Page 59 of 72
Bits
Bit Name
Description
Reset
Access
[9:7]
CLKOUT_FREQ
Configure the frequency of CLKOUT.
0x4
R/W
000: 416 kHz.
001: 435 kHz.
010: 454 kHz.
011: 476 kHz.
100: 500 kHz (default).
101: 526 kHz.
110: 555 kHz.
111: 588 kHz.
6
HART_EN
Enable the path to the CHART pin.
0x0
R/W
0: output of the DAC drives the output stage directly (default).
1: CHART path is coupled to the DAC output to allow a HART modem connection or
connection of a slew capacitor.
5
NEG_OFFSET_EN
Enable negative offset in unipolar VOUT mode. When set, this bit offsets the
currently enabled unipolar output range by the value listed here. This bit is only
applicable to the 0 V to 6 V range and the 0 V to 12 V range. The 0 V to 6 V range
becomes −300 mV to 5.7 V; the 0 V to 12 V range becomes −400 mV to 11.6 V.
0x0
R/W
0: disable (default).
1: enable.
4
CLEAR_NOW_EN
Enables clear to occur immediately, even if the output slew feature is currently enabled.
0x0
R/W
0: disable (default).
1: enable.
3
SPI_DIAG_QUIET_EN
Enable SPI diagnostic quiet mode. When this bit is enabled, SPI_CRC_ERR, SLIPBIT_ERR,
and SCLK_COUNT_ERR are not included in the logical OR calculation, which creates the
DIG_DIAG_STATUS bit in the status register. They are also masked from affecting
the FAULT pin if this bit is set.
0x0
R/W
0: disable (default).
1: enable.
2
OSC_STOP_DETECT_EN
Enable automatic 0x07DEAD code on SDO if the internal oscillator (MCLK) stops.
0x1
R/W
0: disable.
1: enable (default).
1
Reserved
Reserved. Do not alter the default value of this bit.
0x0
R/W
0
Reserved
Reserved. Do not alter the default value of this bit.
0x0
R/W
General-Purpose Configuration 2 Register
Address: 0x0A, Reset: 0x0A0200, Name: GP_CONFIG2
This register is used to configure and enable functions such as the voltage comparators, the internal current output monitor, and the
global software LDAC.
Table 37. Bit Descriptions for GP_CONFIG2
Bits
Bit Name
Description
Reset
Access
21
FAULT_PIN_STATUS
The FAULT_PIN_STATUS bit reflects the inverted current status of the
FAULT pin.
0x0
R
[20:16]
REGISTER_ADDRESS
Register address.
0x0
R
15
Reserved
Reserved. Do not alter the default value if this bit.
0x0
R0
[14:13]
COMPARATOR_CONFIG
Enable/disable the voltage comparator inputs for test pur
poses. The
temperature comparator is permanently enabled. See the Background
Supply and Temperature Monitoring section.
0x0
R/W
00: disable voltage comparators (default).
01: reserved.
10: reserved.
11: enable voltage comparators. The INT_EN bit in the DAC_CONFIG register
must be set for the REFIN buffer to be powered up and this node
available to the REFIN comparator.



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