TMS28F033 datasheet(37/52 Pages) TI

37 / 52 page

CLK

A–1–A16 (word-wide)

A0–A16 (double-word-wide)

LBA

BAA

RY/BY

DQ0–DQ7 and DQ24–DQ31

(word-wide)

DQ0–DQ31 (double-word-wide)

VDDI/VDDE

tAVCH

tELCH

tRHCH

tLLCH

tCHCH1

tCHQX

tCHQZ

tCHQH

tCHGH

tCHBH

tBLCH

tCHQV

tCHQD

tCHQL

tGLCH

tCHAX

tCHRL

tCHLH

BASIC/ENHANCED

PIN SET

DCR0

MODE

DCR1

MODE

DCR2

DIS/

WORD

DCR3

LRV/

BAA

DCR4

BURST

LENGTH

DCR25,24

BURST

LATENCY (X)

DCR29,28

BURST

LATENCY (Y)

DCR30

x16 WRITE

OPTION

DCR31

Basic pin set (DCR0=0)

(see Note E)

Optional

(see Note F)

(see Note G)

(see Note H)

(see Note I)

Enhanced pin set (DCR0=1)

(see Note E

Optional

(see Note F)

(see Note G)

(see Note H)

(see Note I)

NOTES: A. X is a don’t care.

B. See Table 8 through Table 12 for DCR setting descriptions.

C. Address A1 can be loaded as early as clock 5 for overlapped burst reads.

D. Linear burst with the enhanced pin set requires LBO = VIL.

E. Synchronous and asynchronous OE are available (see Figure 20); DCR1 = 0 and DCR1 = 1, respectively.

F. For DIS usage, see Figure 21.

G. For synchronous OE (DCR1 = 0), BAA is not required to burst if OE is used to control the burst (DCR[29:28] = 00).

H. 3–1– . . . –1 is available with MOD4, MOD8, MOD16 (see Figure 17), and MOD32.

I. Linear MOD4 burst is available with 3–1–1–1, 4–1–1–1, 5–1–1–1, and 4–2–2–2 (see Figure 19).

Figure 14. 3–1–1–1 MOD4 Linear Burst With Device Configuration Register Settings

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TMS28F033 Datasheet(PDF) 37 Page - Texas Instruments

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