TMS28F033 datasheet(6/52 Pages) TI

6 / 52 page

TMS28F033

4194304-BIT

SYNCHRONOUS FLASH MEMORY

SMJS833 – NOVEMBER 1997

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

main memory (continued)

Address

Range

x16 Configuration

A–1 is LSB

Address

Range

x32 Configuration

A0 is LSB

3FFFFh

Block 3

1FFFFh

Block 3

30000h

Block 3

64K Addresses

18000h

Block 3

32K Addresses

2FFFFh

Block 2

17FFFh

Block 2

20000h

Block 2

64K Addresses

10000h

Block 2

32K Addresses

1FFFFh

Block 1

0FFFFh

Block 1

08000h

Block 1

96K Addresses

04000h

Block 1

48K Addresses

07FFFh

k 0

03FFFh

k 0

02FFFh

00000h

Overlay Block

12K Addresses

Block 0

32K Addresses

017FFh

00000h

Overlay Block

6K Addresses

Block 0

16K Addresses

Figure 2. TMS28F033 With Four-Block Main-Array Memory Map (DCR5 = 1)

overlay block

The overlay block is a protected memory region that is programmed or erased using special command state

machine (CSM) commands (see Table 4 and Table 5). When enabled, the overlay memory block exists from

addresses 00000h to 017FFh for x32 addressing, or from 00000h to 02FFFh for x16 addressing. Two status

The overlay block status (OBS) bit indicates whether the overlay block is enabled (OBS = 1) or disabled

(OBS = 0) for reading. See Table 2 for the state of the OBS bit for memory-read accessing. The status of the

overlay-block-enable bit (OBEB) does not necessarily indicate that the overlay block is enabled, instead OBEB

reflects the state of the overlay block control switch. When OBEB = 1, the switch is set, and when OBEB = 0,

the switch is not set (see the overlay-block-control functional diagram in Figure 3). See Table 3 for a listing of

methods that set/clear the OBEB.

Table 2. Read-Accessing of the Overlay Block or Main Array

STATE OF OBEB

(SB1)

VPP STATUS

STATE OF OBS

(SB0)

READ ACCESS

VPP ≥ VPPH

Overlay Block

VPP ≤ VPPL

Main Array

X†

Main Array

VPPL < VPP < VPPH

Not guaranteed

Unknown

† X is a don’t care.

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