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TMS28F033 Datasheet(PDF) 1 Page - Texas Instruments |
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TMS28F033 Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 52 page ![]() TMS28F033 4194304-BIT SYNCHRONOUS FLASH MEMORY SMJS833 – NOVEMBER 1997 1 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 D Organization – 512K-Byte Main Array – 24K-Byte Protected Overlay-Block D User-Defined x16 or x32 Data Bus D Read Transfer Data Rates Up to 100 MBytes / s at Bus Frequencies Up to 40 MHz D Burstable Pipelined Read Interface With Programmable Latency, Length, and Order D 10000 Program/Erase Cycles D Three Temperature Ranges – Commercial...0 °C to 70°C – Extended...– 40 °C to 85°C – Automotive...– 40 °C to 125°C D 80-Pin Plastic Quad Flatpack (PQFP) (PAF Suffix) D Fully Automated On-Chip Erase and Program Operations D Three Separate Voltage Supplies – I / O Supply – Configurable 3.3 V / 5 V – Read Supply – 5 V – Programming Supply – 12 V D All Inputs/Outputs TTL-Compatible description The TMS28F033 is the first synchronous nonvolatile flash memory device to offer a configurable burst interface to 16/32-bit microprocessors and microcontrollers operating at frequencies up to 40 MHz. The TMS28F033 contains 4M bits of main memory that is user-configurable as either three or four independently erasable blocks. In addition to the main memory array, there is a protected overlay memory block that is normally hidden from the memory address map. The following table shows the three- and four-block main-memory-array configurations for both 16-bit and 32-bit data bus widths. Table 1. Memory Configurations DATA BUS WIDTH 3-BLOCK MAIN ARRAY 4-BLOCK MAIN ARRAY PROTECTED OVERLAY BLOCK 16 bits 32K, 160K, and 64K 32K, 96K, 64K, and 64K 12K 32 bits 16K, 80K, and 32K 16K, 48K, 32K, and 32K 6K Embedded program and block-erase functions are fully automated by an on-chip write state machine (WSM), which simplifies these operations and relieves the system microcontroller of these secondary tasks. WSM status can be monitored by the on-chip status register to determine the progress of program/erase tasks. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright © 1997, Texas Instruments Incorporated ADVANCE INFORMATION concerns new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 DQ16 DQ17 DQ18 DQ19 VDDE VSSE DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 VDDE VSSE DQ28 DQ29 DQ30 DQ31 A–1 A0 A1 A2 DQ15 DQ14 DQ13 DQ12 VSSE VDDE DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 VSSE VDDE DQ3 DQ2 DQ1 DQ0 NC NC NC A16 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 PAF 80-PIN PACKAGE (T0P VIEW) |
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