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FXLS93421 Datasheet(PDF) 159 Page - NXP Semiconductors

Part # FXLS93421
Description  Dual channel inertial sensor
PDF  254 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FXLS93421 Datasheet(HTML) 159 Page - NXP Semiconductors

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NXP Semiconductors
FXLS9xxxx
Dual channel inertial sensor
The device ignores the Register Write command if the command is sent to any other
physical address, including the DSI Global Device Address of '0000', with one exception
as explained in Section 12.3.4.3.
The Register Write command uses the byte address definitions shown in Section 11.1.
Writable registers along with their Byte addresses are shown in Section 11.1.
Address
Command
Data
PA3
PA2
PA1
PA0
C3
C2
C1
C0
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
CRC
PA[3]
PA[2]
PA[1]
PA[0]
1
0
0
0
RA[7]
RA[6]
RA[5]
RA[4]
RA[3]
RA[2]
RA[1]
RA[0]
RD[7]
RD[6]
RD[5]
RD[4]
RD[3]
RD[2]
RD[1]
RD[0]
8 bits
Table 236. Register write command format
Bit field
Definition
PA[3:0]
DSI physical address. This field contains the physical address. This field must match the PADDR[3:0] bits
in the PHYSADDR register. Otherwise, the command is ignored.
C[3:0]
Register Write Command = 1000'
RA[7:0]
RA[7:0] contains the byte address of the register to be read.
RD[7:0]
RD[7:0] contains the data to be written to the register addressed by RA[7:0].
Table 237. Register write command format description
Address
Command
Data
PA3
PA2
PA1
PA0
C3
C2
C1
C0
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
CRC
PA[3]
PA[2]
PA[1]
PA[0]
1
0
0
0
RD[15] RD[14] RD[13] RD[12] RD[11] RD[10] RD[9]
RD[8]
RD[7]
RD[6]
RD[5]
RD[4]
RD[3]
RD[2]
RD[1]
RD[0]
8 bits
Table 238. Register write command: response format
Bit field
Definition
PA[3:0]
DSI physical address. This field contains the PADDR[3:0] bits in the PHYSADDR register.
C[3:0]
Register Write Command = '1000'
RD[15:8]
The data contained in the register addressed by RA[7:1] + 1 (High Byte) (after the register write is
executed)
RD[7:0]
The data contained in the register addressed by RA[7:1] + 0 (Low Byte) (after the register write is
executed)
Table 239. Register write command: response format description
A register write command to a register address outside the addresses listed in
Section 11.1 will not execute, but will result in a valid response. The data for the registers
will be '0x0000'.
A register write command to a read-only register will not execute, but will result in a valid
response. The data for the registers will be the current contents of the register.
12.3.4.3 Global register write command to the PHYSADDR register
The device supports the Register Write command as a global address under the
following conditions:
1. The Register Write command is written to the PHYSADDR register.
FXLS9xxxx
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 6 — 8 February 2021
159 / 254



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