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FXLS93421 Datasheet(PDF) 172 Page - NXP Semiconductors |
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FXLS93421 Datasheet(HTML) 172 Page - NXP Semiconductors |
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172 / 254 page ![]() NXP Semiconductors FXLS9xxxx Dual channel inertial sensor Error condition Effect on discovery mode Effect on daisy chain Supply Error Discovery Commands Ignored. The device does not participate in Discovery Mode Daisy Chain Commands Ignored. The device will not participate in Daisy Chain Memory Error No Effect. The device attempts to participate in Discovery Mode as programmed. No Effect. The device will attempt to participate in Daisy Chain as programmed. Temperature Error No Effect. The device will attempt to participate in Discovery Mode as programmed. No Effect. The device will attempt to participate in Daisy Chain as programmed. Communication Error (Internal) No Effect. The device participates in Discovery Mode as programmed. No Effect. The device will participate in Daisy Chain as programmed. Offset Error No Effect. The device will participate in Discovery Mode as programmed. No Effect. The device will participate in Daisy Chain as programmed. Self-test Incomplete or Self-test Active Not Applicable. Not Applicable. Device Not Locked No Effect. The device will participate in Discovery Mode as programmed. No Effect. The device will participate in Daisy Chain as programmed. Table 258. DSI3 error handling - discovery mode and daisy chain mode 13 PSI5 protocol 13.1 Communication interface overview The communication interface between a master device and this slave device in PSI5 mode is established via a PSI5 compatible 2-wire interface, with parallel or serial (daisy- chain) connections to the satellite modules. Figure 81 shows one possible system configuration for multiple satellite modules in parallel. aaa-030665 DISCRETE COMPONENTS Slave Module #1 Master Device VCC VSS VCC_OUT VSS_OUT VCC IData IData VSS DISCRETE COMPONENTS Slave Module #2 VCC VSS VCC_OUT VSS_OUT VCC VSS Figure 81. PSI5 satellite interface diagram 13.2 Data transmission physical layer This device uses a two wire interface for both its power supply (VCC), and data transmission (IDATA). The PSI5 master sup-plies a pre-regulated voltage to this device. Data transmissions and synchronization control from the PSI5 master to this device are FXLS9xxxx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 6 — 8 February 2021 172 / 254 |
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