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FXLS93421 Datasheet(PDF) 187 Page - NXP Semiconductors

Part # FXLS93421
Description  Dual channel inertial sensor
PDF  254 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FXLS93421 Datasheet(HTML) 187 Page - NXP Semiconductors

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NXP Semiconductors
FXLS9xxxx
Dual channel inertial sensor
Table 269 shows the default PSI5 response transmission, Table 270 shows the PSI5
timing parameters, and Table 271 and Table 272 show the sensor data configuration
details for each channel.
The default settings apply until the UF2 user OTP memory is written and the UF2 block is
locked.
aaa-038810
Ch0 Response
Ch1 Response
500 µs
244 µs
Ch0 Response
47 µs
Figure 93.  PSI5 default mode transmission
Start bits
Sensor data (See Section 11.6.4.9)
CRC
S2
S1
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 C2 C1 C0
Init Data
0
0
0
0
0
0
10-bit Initialization Data as specified in Section 13.4.2.1
C2 C1 C0
Table 269. Default PSI5-P16C transmission mode
Parameter
Default typical value
Default register bit values
Ch0 Time Slot
47 µs
$27, $26: $PDCM_RSPST0 = 0x002F
Ch1 Time Slot
244 µs
$2B, $2A: $PDCM_RSPST1 = 0x00F4
Data Size
16-bit
$1A: SOURCEID_0[6:4] = 3'b100
Error Checking
3-bit CRC
$25: PSI5_CFG[2] = 1'b1
Baud Rate
Low Baud Rate: 125 kB/s, Bit Time = 8.0 µs
$23: CHIPTIME[3:0] = 3'b1000
Table 270. Default PSI5-P16C transmission mode timing parameters
Parameter
Value
Default register bit values
Sensor Data Range
702.6 g
$40, $48: CHx_CFG_U1[1:0] = 2'b00
Sensor Data Sensitivity
43.79 LSB/g
$41, $49: CHx_CFG_U2[7:0] = 0x00
Sensor data low-pass filter
400 Hz, 4-Pole LPF
$40, $48: CHx_CFG_U1[7:4] = 4'b0000
Sensor data offset cancellation 0.04 Hz, 1-Pole HPF with Rate Limiting
Enabled
$43, $4B: CHx_CFG_U4[5:4] = 2'b00
Table 271. Default PSI5-P16C transmission mode, High g sensor data configuration
FXLS9xxxx
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 6 — 8 February 2021
187 / 254



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