CEC1712 datasheet(153/338 Pages) MICROCHIP

153 / 338 page

 2020-2021 Microchip Technology Inc.

DS00003416C-page 153

CEC1712

12.5

Power, Clocks and Reset

This section defines the Power, Clock, and Reset parameters of the block.

12.5.1

POWER DOMAINS

12.5.2

CLOCK INPUTS

12.5.3

RESETS

12.6

Description

12.6.1

WDT OPERATION

12.6.1.1

WDT Activation Mechanism

The WDT is activated by the following sequence of operations during normal operation:

Load the WDT Load Register with the count value.

Set the WDT_ENABLE bit in the WDT Control Register.

The WDT Activation Mechanism starts the WDT decrementing counter.

12.6.1.2

WDT Deactivation Mechanism

The WDT is deactivated by the clearing the WDT_ENABLE bit in the WDT Control Register. The WDT Deactivation

Mechanism places the WDT in a low power state in which clock are gated and the counter stops decrementing.

Name

Description

VTR_CORE

The logic and registers implemented in this block reside on this single

power well.

Name

Description

32KHz

The 32KHz clock input is the clock source to the Watchdog Timer

functional logic, including the counter.

TABLE 12-1:

RESET INPUTS

Name

Description

RESET_SYS

Power on Reset to the block. This signal resets all the register and logic in

this block to its default state following a POR or a WDT Event event.

RESET_SYS_nWDT

This reset signal is used on WDT registers/bits that need to be preserved

through a WDT Event.

TABLE 12-2:

RESET OUTPUTS

Source

Description

WDT Event

Pulse generated when WDT expires. This signal is used to either

generate interrupt WDT_INT, if WDT Control Register bit 9 is set to 1b

(WDT_INT_ENABLE), or reset the embedded controller and its

subsystem, if WDT Control Register bit 9 is set to 0b.

The event is cleared after a RESET_SYS.

CEC1712 Datasheet(PDF) 153 Page - Microchip Technology

CEC1712 Datasheet(HTML) 153 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL