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CEC1712 Datasheet(PDF) 171 Page - Microchip Technology |
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CEC1712 Datasheet(HTML) 171 Page - Microchip Technology |
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171 / 338 page  2020-2021 Microchip Technology Inc. DS00003416C-page 171 CEC1712 25:24 CAPTURE_EDGE3 This field selects the edge type that triggers the capture of the Free Running Counter into Capture Register 3. 3=Capture event disabled 2=Both rising and falling edges 1=Rising edges 0=Falling edges R/W 0h RESET _SYS 23:21 FCLK_SEL2 This 3-bit field sets the clock source for the input filter for Capture Register 2. See Table 14-2, "Timer Clock Frequencies" for a list of available frequencies. R/W 0h RESET _SYS 20:19 Reserved RES - - 18 FILTER_BYP2 This bit enables bypassing the input noise filter for Capture Regis- ter 2, so that the input signal goes directly into the timer. 1=Input filter bypassed 0=Input filter enabled R/W 0h RESET _SYS 17:16 CAPTURE_EDGE2 This field selects the edge type that triggers the capture of the Free Running Counter into Capture Register 2. 3=Capture event disabled 2=Both rising and falling edges 1=Rising edges 0=Falling edges R/W 0h RESET _SYS 15:13 FCLK_SEL1 This 3-bit field sets the clock source for the input filter for Capture Register 1. See Table 14-2, "Timer Clock Frequencies" for a list of available frequencies. R/W 0b RESET _SYS 12:11 Reserved RES - - 10 FILTER_BYP1 This bit enables bypassing the input noise filter for Capture Regis- ter 1, so that the input signal goes directly into the timer. 1=Input filter bypassed 0=Input filter enabled R/W 0h RESET _SYS 9:8 CAPTURE_EDGE1 This field selects the edge type that triggers the capture of the Free Running Counter into Capture Register 1. 3=Capture event disabled 2=Both rising and falling edges 1=Rising edges 0=Falling edges R/W 0h RESET _SYS Offset 04h Bits Description Type Default Reset Event |
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