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CD1865 Datasheet(PDF) 91 Page - Intel Corporation |
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CD1865 Datasheet(HTML) 91 Page - Intel Corporation |
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91 / 150 page ![]() Intelligent Eight-Channel Communications Controller — CD1865 Datasheet 91 if (int_status & 0x02) Service_Mdm(); } //while outportb(S8259, EOI); /* End of Interrupt */ outportb(S8259, RDISTAT); /* Next access read the IS Reg. */ if ( !inportb(S8259) ) /* while the slave is not serving any int. */ outportb(M8259, EOI); /* issue End of Int. (EOI) to master */ Once the interrupt source has been determined, the request must be serviced by issuing an IACKIN signal to the device with the preprogrammed PILR match value supplied as the address. A receive interrupt acknowledge cycle might be written as shown. Immediately following the write to the EOIR register to terminate the current interrupt context, the 8259A must be informed that the service is over. This is done by the simple procedure shown at the end of the interrupt source determination routine above. Receive Interrupt Service Service_Rx(unsigned char chan) { unsigned charchannel, vector, RxCount; int i; vector= Read_Byte(0x8a); // perform hardware acknowledge channel = Read_Byte(GSCR1) >> 2; RxCount=Read_Byte(RDCR); // RDCR contains the number of byte to be transfered. if ((RxCount>0)&&(RxCount<=8)) { if ((exception_data = Read_Byte(RCSR)) != 0) // Receive Exception: in this // Example, we disable receive // Operation if detected a receive // Exception. { Set_Byte(CAR, chan); Set_Byte(SRER, 0x00); // Disable receive } else // Normal Receive Operation: no // Receive exception. { if (channel==chan){ // Correct Receiving Channel for (i=RxCount; i>0; i--){ rx_str[rx_ptr]=Read_Byte(RDR); rx_ptr++; }//for }//if else // Incorrect Receiving Channel Rx_chan_err = 1; } // else } //if Set_Byte(EOSRR, 0x00); // Set Transmit End of Int Reg. The Transmit End of // Interrupt Register must be written to by the // Corresponding host interrupt service routine to |
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