CD1865 datasheet(15/150 Pages) INTEL

15 / 150 page

Intelligent Eight-Channel Communications Controller — CD1865

Datasheet

3.0

Device Selection Considerations

The CD1865 device is an enhanced version of the same product family as the CD180 and CD1864.

The CD1865 is software compatible with both the CD180 and CD1864. If this is a new CD1865

design, please skip this page.

The CD1865 is recommended for any new designs. Please note that to achieve the high data rates,

66-MHz system clock is required. To support data rates of up to 115.2 kbps, the specified system

clock frequency is required. Please refer to the differences in pins between the CD1864 and

CD1865. It is recommended that the 66-MHz, 2

×-clock option (oscillator or crystal) is used

wherever possible.

Note:

This input (DTRSEL) on the CD180 sets the mode for the DTR*/CD* pins. When DTRSEL is

high, the DTR*/CD* pins implement the DTR* output; when low, the DTR*/CD* pins become

CD* inputs.

The CD1864 and CD1865 have separate DTR and CD pins and so the DTRSEL is eliminated.

Note:

In January 1995, Intel changed all 100-pin PQFP package types from EIAJ to JEDEC. The

CD1865 is now available in a JEDEC package. Before beginning any new design or converting

from CD1864 to CD1865, please contact Intel for package details.

Warning:

The CD1865 device may have potential latch up problems if used in socket. It is recommended that

this device be surface mounted.

Table 1.

CD18XX Product Family

Features

CD180

CD1864

CD1865

Package

84-pin PLCC

100-pin PQFP

100-pin MQFP

System clock

12.5 MHz

25 MHz (

×2) or

12.5 MHz (

×1)

66 MHz (

×2) or

33 MHz (

×1)

Maximum bit rates

64 kbps

115.2 kbps

Pins

DTRSEL *

––

4 modem/IO signals per

channel

5 modem/IO signals per

channel

5 modem/IO signals per

channel

Table 2.

Differences Between the CD1865 and CD1864

Pin Number

CD1865

Pin Name

CD1864

Pin Name

Comments

1VCC

n/c

Note 1

GND

n/c

Note 1

VCC

n/c

Note 2

NOTES:

1. Pin 1 and pin 16 are truly no-connects on the CD1864 device.

2. Pin 37 on the CD1864 is not a true no-connect, and can cause problems if connected to VCC. To make a

single board design be compatible with either the CD1864 or CD1865, a configuration jumper must be used

to allow pin 37 to be a no-connect or a VCC connection.

CD1865 Datasheet(PDF) 15 Page - Intel Corporation

CD1865 Datasheet(HTML) 15 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL