CD1865 datasheet(56/150 Pages) INTEL

56 / 150 page

CD1865 — Intelligent Eight-Channel Communications Controller

Datasheet

To recognize how this difference can cause a problem, suppose that the three Service Request lines

from the CD1865 are connected to levels 7, 6, and 5 of the VME bus (see Figure 19 on page 56).

Also, attach a 74XX244 so that during an Interrupt Acknowledgment cycle provides an 8-bit code

consisting of the three address bits plus five more hard-wired bits to the CD1865. Now, whenever

an acknowledgment of a level 5, 6, or 7 interrupt occurs, the CD1865 either responds or passes the

acknowledgment properly. If an acknowledgment occurs on levels 1–4, the daisy chain ‘breaks’

because the CD1865 does not recognize a match.

This condition can be easily rectified, as shown in Figure 20 on page 57. A PAL is used to assert

ACKOUT* whenever ACKIN* occurs on a level not being used by the CD1865. The PAL is

programmed for fixed levels. For example, if the current VME bus Interrupt level is 1–4, the PAL

asserts ACKOUT* whenever ACKIN* is active. If the current level is 5–7, the PAL asserts

ACKOUT* when ACKOUT* from the CD1865 is active. If required, the assignment of VME

Interrupt levels to the CD1865 can be field-programmable by supplying additional inputs to the

PAL, indicating the levels being used by the CD1865.

Figure 19. Incorrect VME Interface

CD1865

A0–A6

RREQ*

TREQ*

MREQ*

ACKOUT* ACKIN*

74XX244

ARBITRARY

VALUE

A1–A3

IRQ7*

IRQ6*

IRQ5*

ACKIN*

ACKOUT*

A1–A7

VME BUS

(BUFFERS NOT SHOWN)

IACK*

CD1865 Datasheet(PDF) 56 Page - Intel Corporation