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CD1865 Datasheet(PDF) 38 Page - Intel Corporation |
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CD1865 Datasheet(HTML) 38 Page - Intel Corporation |
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38 / 150 page ![]() CD1865 — Intelligent Eight-Channel Communications Controller 38 Datasheet 5.5.2 Method 1b — Full Interrupt – Type B, Three-Level Interrupt with Single-Level Acknowledge This method is illustrated in Figure 9. It is useful with 80X86 systems that use the 8259A Interrupt Controller. Since the 8259A supplies its own vector to the host when an INTA cycle occurs, the host can simply read the CD1865’s vector by the method described in the polled interface example or a separate device select decode can be provided to drive the ACKIN* input. After the 8259A supplies a vector to the 80X86 host CPU, the host performs a software acknowledgment to the CD1865, and transfers the CD1865 vector to the host. This allows the service request to be processed. Figure 8. Three-Level Interrupt with Three-Level Acknowledge Example EIGHT-LEVEL PRIORITY ENCODER CD1865 # 2 CD1865 # 1 M68000 MICROPROCESSOR ADDRESS DECODE LOGIC A1–A3 A8–A23 A4–A7 D0–D7 AS* IPL1 IPL2 IPL3 A0–A2 A3–A6 CS* D0–D7 RREQ* TREQ* MREQ* A0–A2 A3–A6 CS* D0–D7 RREQ* TREQ* MREQ* ACKIN* ACKOUT* ACKOUT* ACKIN* |
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