DA6021 datasheet(34/225 Pages) RENESAS

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DA6021

HIGHLY INTEGRATED POWER MANAGEMENT IC FOR

INTEL® ATOM™ Z3000 PROCESSOR

Company Confidential

Data Sheet

Version 3.A - Final

31-Jan-14

34 of 224

www.dialog-semiconductor.com

.FCOT[3:0]

toggles SLP_S0iX_B = 1 to

exit S0iX

SLP_S0iX_B

SLP_S0iX_B=1

SLP_S3_B=1

SLP_S4_B =1

SOC_S0

Exit S0iX state

SLP_S3_B

SLP_S3_B=0

Or SLP_S4_B=0

SOC_S3

Enter S3 state

Table 9: SOC S0iX State Transition

SOC S3 State

9.3.3

The entering and exiting of each the SOC S3 state is controlled by a signal which is delivered to DA6021by the

SOC via a dedicated physical pin SLP_S3_B. The exiting of SLP_S3_B is also gated by BATLOW_B.



Rails that are on:

They are shown in the power sequencing diagrams

VRs shall be placed in PFM/power save mode

Internal PMIC rails



Interfaces available:

SVID is OFF in S3

I2C is OFF in S3



Input source comparators and interrupts active.



All registers powered, with states retained.



Thermal monitoring and VR current measurements are disabled by default. If enabled, the measurements

are taken at standby frequency.

The events causing a transition out of the ‘SOC S3’ state are shown in the table below.

Event Trigger

Conditions (all

mandatory)

Next state

Note

Input power Source removal and

Main Battery Removal/Depletion

VSYS < VMIN

VBATBKUP>VMIN

DA6021 loses states, except

RTC powered registers

Restart with default values

except RTC powered registers

VSYS < VMIN

VBATBKUP<VMIN

DA6021 loses states, RTC

powered registers loses states

Re-start with default values

See event and conditions in Cold off Triggers

SOC_G3

See “Cold Off Triggers”

Power Button Held

Power Button held

time < PBCONFIG

.FCOT[3:0]

S0iX

DA6021 passes PWRBTN_B

information to SoC. SoC

toggles first SLP_S3_B=1 to

exit S3 state followed by

SLP_S0iX_B = 1 to exit S0iX

SLP_S3_B

SLP_S3_B=1

SLP_S4_B =1

BATLOW_B=1

SOC_S0iX

Exit S3 state

SLP_S4_B

SLP_S4_B=0

SOC_S4

Enter S4

Table 10: SOC S3 State Transition

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