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DA6021 Datasheet(PDF) 80 Page - Renesas Technology Corp |
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DA6021 Datasheet(HTML) 80 Page - Renesas Technology Corp |
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80 / 225 page ![]() DA6021 HIGHLY INTEGRATED POWER MANAGEMENT IC FOR INTEL® ATOM™ Z3000 PROCESSOR Company Confidential Data Sheet Version 3.A - Final 31-Jan-14 © 2014 Dialog Semiconductor GmbH 80 of 224 www.dialog-semiconductor.com PS3 – C6 at S0ix The SoC sends a SVID command SetVID_decay with 0V to enter the PS3 mode. DA6021 switches off all unnecessary functional blocks minimizing the quiescent current. When detecting an exit from S0ix state, the SoC sends SetVID_fast/slow and DA6021 recovers VCC to the operating voltage level. Figure 28: VCC Timings 11.6.1.3 Electrical Characteristics VCC PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Val VCC_IN Input Voltage 2.7 4.5 V - Cin at VCC_IN 4 x 4.7 µF - Cout 6 x 47 μF - ESR of output capacitor 6 @ 47µF mΩ - ESL of output capacitor 1.6 @ 3MHz nH - L_BUCK inductor value -20% 4x0.47 +20% μH - L_R inductor DC resistance 48 mΩ - VCC Output Voltage IOUT= Imax 0.50 1.2 V A VCC Output Accuracy See chapter 0 A F_BUCK Frequency of operation Tablet 3 MHz A Transient load current profile 1000-8000mA 25-7000mA 200 200 ns ns - Transient droop 1 1000-8000mA 25-7000mA 40 mV E Transient overshoot 2 8000-1000mA 7000-25mA 40 mV E Ton Turn on time 2 ms E Toff Turn off time Vout down to 0.5V 20 µs D Rpd Discharge impedance 0.5V down to 0V 20 Ω A IQ_ON Quiescent Current in On Mode No load 200 µA E Normal Mode – Synchronous rectification (PWM) Maximum Output Current (Imax) 8000 mA D ILIMIT Current limitation Cycle by cycle 1.3*Imax mA A* Boot up voltage for VCC VBOOT 1.1 V D,E Efficiency at VSYS = 3.7V & Tamb=60°C with proposed external components and PCB layout Typical BOM environment See Figure 29 D,E, A* 3 1 Including DC accuracy, ripple and load regulation 2 Including DC accuracy, ripple and load regulation 3 RDSON measurement on ATE |
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