DA6021 datasheet(79/225 Pages) RENESAS

79 / 225 page

DA6021

HIGHLY INTEGRATED POWER MANAGEMENT IC FOR

INTEL® ATOM™ Z3000 PROCESSOR

Company Confidential

Data Sheet

Version 3.A - Final

31-Jan-14

79 of 224

www.dialog-semiconductor.com

Low Power State Control Signals

11.5.7

SLP_S0iX_B is asserted low when SoC goes into S0iX state. When S0iX_B signal is held low, VNN, V1P0_A,

V1P8_A and VDDQ are entering a low power state. V1P0SX,V1P05S, V1P2SX, V1P8SX, VHDMI, VBUS,

VDDQ_VTT and V2P85SX are switched off.

Power Supplies

11.6

DC/DC Buck Regulator VCC

11.6.1

The BUCK_CORE converter is a high efficiency synchronous quad phase step down regulator operating at a

high frequency (3 MHz) supplyi

ng a voltage (VCC) of 0.5 … 1.2V at maximum 8000mA. This buck regulator has

the ability to dynamically change its output voltage setting to per SoCs frequency-power requirements. The

output voltage is controlled using the SVID interface.

Figure 27: VCC Block Diagram

11.6.1.1

VCC Current

The SoC has the ability to increase the core frequency during burst mode (achieving exceptional performance)

when the system environment is conducive. As long as the thermal and power budget allows, the current of the

VCC voltage rail can be more than twice the normal mode value.

Imax = 8000mA

11.6.1.2

Power States

PS0

– active state:

DA6021 VCC voltage rail can handle up to 8A peak current for a duration of several seconds before it reaches

the maximum operational temperature of DA6021. The regulator automatically switches between synchronous

PWM and asynchronous PFM mode depending on the load.

At usage workloads, VCC current is typically in the range of 200mA to 1500mA

PS1:

N/A

PS2

– C6 at S0idle

When the SoC enters the C6 state it sends a SetVID_decay to C6 VID voltage command. DA6021 sets the

output voltage to the C6 level, without discharging the output capacitors. In PS2 mode VCC regulator turns off all

unnecessary functional blocks for minimal power dissipation. Exiting PS2 mode can either be achieved after

receiving a SetPS to PS0 or SetVID_slow/fast to a value equal or higher VID voltage rail. The power state

transition delay time is ≤ 5µs

In this power saving mode the VCC buck supports up to 200mA without catastrophic failure.

VCC_GND

BUCK_VCC

VCC_VIN

0.5V

–1.2V

8 A

VCC_FBP

VCC_FBN

LX1

0.47µH

LX2

LX3

LX4

VCC bus

DA6021 Datasheet(PDF) 79 Page - Renesas Technology Corp

DA6021 Datasheet(HTML) 79 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL