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DA6021 Datasheet(PDF) 60 Page - Renesas Technology Corp |
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DA6021 Datasheet(HTML) 60 Page - Renesas Technology Corp |
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60 / 225 page ![]() DA6021 HIGHLY INTEGRATED POWER MANAGEMENT IC FOR INTEL® ATOM™ Z3000 PROCESSOR Company Confidential Data Sheet Version 3.A - Final 31-Jan-14 © 2014 Dialog Semiconductor GmbH 60 of 224 www.dialog-semiconductor.com T3_V1P2S Ramp-down Time from 90% to 10% 0,5 1,00 2,00 0,074 T4_V1P2S- V1P8S Rail to Subsequent Rail Turn-Off Delay 0,5 1,00 3,00 0,660 T3_V1P8S Ramp-down Time from 90% to 10% 0,5 1,00 2,00 0,037 T4_V1P8S- V1P05S Rail to Subsequent Rail Turn-Off Delay 0,5 1,00 3,00 0,878 T3_V1P05S Ramp-down Time from 90% to 10% 0,5 1,00 2,00 0,426 T4_V1P05S- V1P0S Rail to Subsequent Rail Turn-Off Delay 0,5 1,00 3,00 0,533 T3_V1P0S Ramp-down Time from 90% to 10% 0,5 1,00 2,00 0,574 T4_V1P0S-VCC Rail to Subsequent Rail Turn-Off Delay 0,5 1,00 3,00 0,997 T3_VCC Ramp-down Time from 90% to 10% 0,5 1,00 2,00 0,196 T4_VCC-VNN Rail to Subsequent Rail Turn-Off Delay 0,5 1,00 3,00 0,512 T3_VNN Ramp-down Time from 90% to 10% 0,5 1,00 2,00 0,203 T4_VNN-V5P0S Rail to Subsequent Rail Turn-Off Delay 0,5 1,00 3,00 0,548 T3_V5P0S Ramp-down Time from 90% to 10% 0,5 1,00 2,00 4,557 T2_VSYS_S VCCAPWROK deassertion to OnDemand VR starts to turn off 0,5 1,00 3,00 2,327 T3_VSYS_S Ramp-down Time from 90% to 10% 0,5 1,00 2,00 0,003 T2_VSDIO SLP_S3_B deassertion to OnDemand VR starts to turn off 0,5 1,00 3,00 1,284 T3_VSDIO Ramp-down Time from 90% to 10% 0,5 1,00 2,00 0,025 T6 SLP_S3_B assertion to SLP_S4_B assertion 0 SOC related T7 SLP_S4_B assertion to DRAMPWROK deassertion 0,000 0,024 26,02 0,015 T4_V5P0S- VREFDQ0 Rail to Subsequent Rail Turn-Off Delay 0,5 1,00 3,00 0,601 T8 DRAMPWROK deassertion to VREFDQ0 starts to turn off 0,000 0,024 0,032 0,005 T3_VREFDQ0 Ramp-down Time from 90% to 10% 0,5 1,00 2,00 0,063 T4_VREFDQ0- VREFDQ1 Rail to Subsequent Rail Turn-Off Delay 0,5 1,00 3,00 0,513 T3_VREFDQ1 Ramp-down Time from 90% to 10% 0,5 1,00 2,00 0,062 T4_VREFDQ1- VDDQ Rail to Subsequent Rail Turn-Off Delay 0,5 1,00 3,00 0,535 T3_VDDQ Ramp-down Time from 90% to 10% 0,5 1,00 2,00 0,999 T4_VDDQ- VSYS_U Rail to Subsequent Rail Turn-Off Delay 0,5 1,00 3,00 1,027 T3_VSYS_U Ramp-down Time from 90% to 10% 0,5 1,00 2,00 0,085 T4_VSYS_U- V3P3U Rail to Subsequent Rail Turn-Off Delay 0,5 1,00 3,00 1,079 T3_V3P3U Ramp-down Time from 90% to 10% 0,5 1,00 2,00 1,024 T4_V3P3_U- V1P8U Rail to Subsequent Rail Turn-Off Delay 0,5 1,00 3,00 0,970 T3_V1P8U Ramp-down Time from 90% to 10% 0,5 1,00 2,00 0,329 T9 V1P8U voltage < 10% to RSMRST_B assertion 0,000 0,024 0,032 0,098 T10 RSMRST_B assertion to V3P3A starts to turn off 0,000 0,024 0,032 0,036 T3_V3P3A Ramp-down Time from 90% to 10% 0,5 1,00 2,00 0,951 |
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