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DA6021 Datasheet(PDF) 37 Page - Renesas Technology Corp |
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DA6021 Datasheet(HTML) 37 Page - Renesas Technology Corp |
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37 / 225 page ![]() DA6021 HIGHLY INTEGRATED POWER MANAGEMENT IC FOR INTEL® ATOM™ Z3000 PROCESSOR Company Confidential Data Sheet Version 3.A - Final 31-Jan-14 © 2014 Dialog Semiconductor GmbH 37 of 224 www.dialog-semiconductor.com Register File and Address Range 9.4 There are 5 register blocks, one for VNN, one for VCC, one for test purpose, one for Intel and another block controlling the power sequence. These blocks can either be accessed via the SVID or I2C interface, via OTP or the external EEPROM, see picture blow. Figure 7: Address Range and Pages The power sequence is located in the page 0 of the register map and shall not be modified by customer. It is highly recommended not to modify any register in page 0 as this may damage the system. Please contact Dialog Semiconductor if you need changes in the sequencing. Such updates can be made in 2 ways, via new OTP, This would mean producing a new DA6021 variant, or via an external EEPROM. Page 1 includes all the registers to control the ADC functions, GPIO’s, PWM controller, controllable voltage domains and further functions described in the document below. Page 2 and 3 include the SVID functions for the core and the graphics regulators. Page 4 is an internal register block for DA6021 internal test functions. Slave ID versus DA6021 Pages 9.4.1 Each page can be accessed via the I2C interface while using a certain slave ID to address the corresponding I2C slave. The table below shows the relation between slave ID and page to be accessed: PAGE Accessed SLAVE_ID Read Address Write Address Page 1 0x6E 0xDD 0xDC Page 2 – SVID 0x5C 0xB9 0xB8 Page 3 – SVID 0x6C 0xD9 0xD8 Table 14: Slave ID versus DA6021 Storage Page PAGE 4 TEST PAGE 0 (OTP) 0x00 0xFF 0x4FF OTP CTTL EEPROM I2C Slave PAGE 2 (VCC) 0x000 0x0FF SVID Slave 0x000 0x200 0x3FF PAGE 3 (VNN) 0x100 0x1FF PAGE 1 INTEL 0x1FF 0xFF 0x100 0x400 |
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