Electronic Components Datasheet Search
  English  ▼

X  

PM7375-SC Datasheet(PDF) 130 Page - PMC-Sierra, Inc

Part # PM7375-SC
Description  LOCAL ATM SAR & PHYSICAL LAYER
PDF  430 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7375-SC Datasheet(HTML) 130 Page - PMC-Sierra, Inc

Back Button PM7375-SC Datasheet HTML 126Page - PMC-Sierra, Inc PM7375-SC Datasheet HTML 127Page - PMC-Sierra, Inc PM7375-SC Datasheet HTML 128Page - PMC-Sierra, Inc PM7375-SC Datasheet HTML 129Page - PMC-Sierra, Inc PM7375-SC Datasheet HTML 130Page - PMC-Sierra, Inc PM7375-SC Datasheet HTML 131Page - PMC-Sierra, Inc PM7375-SC Datasheet HTML 132Page - PMC-Sierra, Inc PM7375-SC Datasheet HTML 133Page - PMC-Sierra, Inc PM7375-SC Datasheet HTML 134Page - PMC-Sierra, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 130 / 430 page
background image
PM7375 LASAR-155
DATA SHEET
PMC-931127
ISSUE 6
LOCAL ATM SAR & PHYSICAL LAYER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
114
10.1.7
Register 0x06 (0x018): LASAR-155 Clock Synthesis Control and
Status
Bit
Type
Function
Default
Bit 15
R
TBUS[2]
X
Bit 14
R
TBUS[1]
X
Bit 13
R
TBUS[0]
X
Bit 12
R
TDOOLV
X
Bit 11
Unused
X
Bit 10
Unused
X
Bit 9
Unused
X
Bit 8
Unused
X
Bit 7
Unused
X
Bit 6
Unused
X
Bit 5
Unused
X
Bit 4
Unused
X
Bit 3
R
TROOLV
X
Bit 2
Unused
X
Bit 1
Unused
X
Bit 0
R/W
TREFSEL
0
This register controls the clock synthesis and reports the state of the transmit phase
locked loop.
TREFSEL:
The transmit reference select (TREFSEL) bit determines the expected frequency
of TRCLK+/-. If TREFSEL is a logic 0, the correct line clock frequency is
synthesized if the reference frequency is 19.44 MHz. If TREFSEL is a logic 1,
the reference frequency must be 6.48 MHz. TREFSEL only has effect if the
TBYP bit in the LASAR-155 Master Configuration register is low.
TROOLV:
The transmit reference out of lock status indicates the clock synthesis phase
locked loop is unable to lock to the reference on TRCLK+/-. TROOLV is a logic
one if the divided down synthesized clock frequency not within 488 ppm of the
TRCLK+/- frequency.
TBUS[2:0], TDOOLV:
The TBUS[2:0] and TDOOLV bits are provided for analog production test and
should be ignored.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com