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PM7375-SC Datasheet(PDF) 159 Page - PMC-Sierra, Inc |
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PM7375-SC Datasheet(HTML) 159 Page - PMC-Sierra, Inc |
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159 / 430 page ![]() PM7375 LASAR-155 DATA SHEET PMC-931127 ISSUE 6 LOCAL ATM SAR & PHYSICAL LAYER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 143 10.1.37 Register 0x40 (0x100): TPOP Control/Diagnostic Bit Type Function Default Bit 15 Unused X Bit 14 Unused X Bit 13 Unused X Bit 12 Unused X Bit 11 Unused X Bit 10 Unused X Bit 9 Unused X Bit 8 Unused X Bit 7 Unused X Bit 6 Unused X Bit 5 Unused X Bit 4 Unused X Bit 3 R/W Reserved 0 Bit 2 R/W Reserved 0 Bit 1 R/W DB3 0 Bit 0 R/W PAIS 0 This register allows insertion of path level alarms and diagnostic signals. PAIS: The PAIS bit controls the insertion of STS path alarm indication signal. When a logic one is written to this bit position, the complete SPE, and the pointer bytes (H1, H2, and H3) are overwritten with the all ones pattern. When a logic zero is written to this bit position, the pointer bytes and the SPE are processed normally. DB3: The DB3 bit controls the inversion of the B3 byte value. When a logic zero is written to this bit position, the B3 byte is transmitted uncorrupted. When a logic one is written to this bit position, the B3 byte is inverted, causing the insertion of eight path BIP-8 errors per frame. Reserved: The reserved bits must be programmed to logic zero for proper operation. |
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