| Electronic Components Datasheet Search |
|
PM7375-SC Datasheet(PDF) 182 Page - PMC-Sierra, Inc |
|
|
|||||||||||||||||||||||||||||
PM7375-SC Datasheet(HTML) 182 Page - PMC-Sierra, Inc |
|
182 / 430 page ![]() PM7375 LASAR-155 DATA SHEET PMC-931127 ISSUE 6 LOCAL ATM SAR & PHYSICAL LAYER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 166 10.1.65 Register 0x63 (0x18C): TACP FIFO Configuration Bit Type Function Default Bit 15 Unused X Bit 14 Unused X Bit 13 Unused X Bit 12 Unused X Bit 11 Unused X Bit 10 Unused X Bit 9 Unused X Bit 8 Unused X Bit 7 R/W Reserved 0 Bit 6 R/W Reserved 0 Bit 5 Unused X Bit 4 Unused X Bit 3 R/W FIFODP[1] 0 Bit 2 R/W FIFODP[0] 0 Bit 1 R/W Reserved 0 Bit 0 R/W Reserved 0 FIFODP[1:0]: The FIFODP[1:0] bits determine the transmit FIFO cell depth. FIFO depth control may be important in systems where the cell latency through the TACP must be minimized. When the FIFO is filled to the specified depth, the TACP back pressures the cell stream from the TALP block. The selectable FIFO cell depths are shown below: FIFODP[1] FIFODP[0] FIFO DEPTH 0 0 4 cells 0 1 3 cells 1 0 2 cells 11 1 cell Reserved: The reserved bits must be programmed to logic zero for proper operation. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |