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PM7375-SC Datasheet(PDF) 184 Page - PMC-Sierra, Inc

Part # PM7375-SC
Description  LOCAL ATM SAR & PHYSICAL LAYER
PDF  430 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7375-SC Datasheet(HTML) 184 Page - PMC-Sierra, Inc

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PM7375 LASAR-155
DATA SHEET
PMC-931127
ISSUE 6
LOCAL ATM SAR & PHYSICAL LAYER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
168
10.1.68
Register 0x66 (0x198): TACP Transmit Cell Counter (MSB)
Bit
Type
Function
Default
Bit 15
Unused
X
Bit 14
Unused
X
Bit 13
Unused
X
Bit 12
Unused
X
Bit 11
Unused
X
Bit 10
Unused
X
Bit 9
Unused
X
Bit 8
Unused
X
Bit 7
Unused
X
Bit 6
Unused
X
Bit 5
Unused
X
Bit 4
Unused
X
Bit 3
Unused
X
Bit 2
R
TCELL[18]
X
Bit 1
R
TCELL[17]
X
Bit 0
R
TCELL[16]
X
TCELL[18:0]:
The TCELL[18:0] bits indicate the number of cells from the TALP block that are
inserted into the SPE during the last accumulation interval. Idle/Unassigned
cells inserted into the SPE are not counted.
A write to any one of the TACP Transmit Cell Counter registers loads the
registers with the current counter value and resets the internal 19 bit counter to 1
or 0. The counter reset value is dependent on if there was a count event during
the transfer of the count to the TACP Transmit Cell Counter registers. The
counter should be polled every second to avoid saturating. The contents of these
registers are valid 7 µs after a transfer is triggered by a write to the transmit cell
count register space.
The error count can also be polled by writing to the LASAR-155 Master
Reset / Load Meters register. Writing to the register loads all the error counter
registers in the SAR PMON, RSOP, RLOP, RPOP, RACP and TACP blocks.



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