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TMPR3911 Datasheet(PDF) 284 Page - Toshiba Semiconductor |
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TMPR3911 Datasheet(HTML) 284 Page - Toshiba Semiconductor |
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284 / 462 page  Chapter 13 SIB Module 13-14 Table 13.3.5 SIB Holding and Shift Register Formats (Subframe 1 Sound) Subframe 1 Sound 16 Bit Stereo: Frame SR[64:49] SR[48:33] SR[32:17] SR[16:1] 0 sndtxhold[31:16] sf1aux[31:16] sndtxhold[15:0] sf1aux[15:0] 1 sndtxhold[31:16] sf1aux[31:16] sndtxhold[15:0] sf1aux[15:0] 2 sndtxhold[31:16] sf1aux[31:16] sndtxhold[15:0] sf1aux[15:0] 3 sndtxhold[31:16] sf1aux[31:16] sndtxhold[15:0] sf1aux[15:0] Subframe 1 Sound 16 Bit Mono: Frame SR[64:49] SR[48:33] SR[32:17] SR[16:1] 0 sndtxhold[31:16] sf1aux[31:16] sndtxhold[31:16] sf1aux[15:0] 1 sndtxhold[15:0] sf1aux[31:16] sndtxhold[15:0] sf1aux[15:0] 2 sndtxhold[31:16] sf1aux[31:16] sndtxhold[31:16] sf1aux[15:0] 3 sndtxhold[15:0] sf1aux[31:16] sndtxhold[15:0] sf1aux[15:0] Subframe 1 Sound 8 Bit Stereo: Frame SR[64:49] SR[48:33] SR[32:17] SR[16:1] 0 sndtxhold[31:24], 8b0 sf1aux[31:16] sndtxhold[23:16], 8b0 sf1aux[15:0] 1 sndtxhold[15:8], 8b0 sf1aux[31:16] sndtxhold[7:0], 8b0 sf1aux[15:0] 2 sndtxhold[31:24], 8b0 sf1aux[31:16] sndtxhold[23:16], 8b0 sf1aux[15:0] 3 sndtxhold[15:8], 8b0 sf1aux[31:16] sndtxhold[7:0], 8b0 sf1aux[15:0] Subframe 1 Sound 8 Bit Mono: Frame SR[64:49] SR[48:33] SR[32:17] SR[16:1] 0 sndtxhold[31:24], 8b0 sf1aux[31:16] sndtxhold[31:24], 8b0 sf1aux[15:0] 1 sndtxhold[23:16], 8b0 sf1aux[31:16] sndtxhold[23:16], 8b0 sf1aux[15:0] 2 sndtxhold[15:8], 8b0 sf1aux[31:16] sndtxhold[15:8], 8b0 sf1aux[15:0] 3 sndtxhold[7:0], 8b0 sf1aux[31:16] sndtxhold[7:0], 8b0 sf1aux[15:0] NOTE: “8b0” = 8-bit field of zero values “SR” = Shift Register Table 13.3.6 SIB Holding and Shift Register Formats (Subframe 1 Telecom) Subframe 1 Telecom 16 Bit: Frame SR[64:49] SR[48:33] SR[32:17] SR[16:1] 0 16b0 sf1aux[31:17], VT teltxhold[31:16] sf1aux[15:0] 1 16b0 sf1aux[31:17], VT teltxhold[15:8] sf1aux[15:0] 2 16b0 sf1aux[31:17], VT teltxhold[31:16] sf1aux[15:0] 3 16b0 sf1aux[31:17], VT teltxhold[15:8] sf1aux[15:0] Subframe 1 Telecom 8 Bit: Frame SR[64:49] SR[48:33] SR[32:17] SR[16:1] 0 16b0 sf1aux[31:17], VT teltxhold[31:24], 8b0 sf1aux[15:0] 1 16b0 sf1aux[31:17], VT teltxhold[23:16], 8b0 sf1aux[15:0] 2 16b0 sf1aux[31:17], VT teltxhold[15:8], 8b0 sf1aux[15:0] 3 16b0 sf1aux[31:17], VT teltxhold[7:0], 8b0 sf1aux[15:0] NOTE: “VS” = valid sound flag bit; “VT” = valid telecom flag bit “8b0” = 8-bit field of zero values; “16b0” = 16-bit field of zero values “SR” = Shift Register |
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