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ADXL366 Datasheet(PDF) 42 Page - Analog Devices

Part # ADXL366
Description  Micropower, 3-Axis, ±2g/±4g/±8g Digital Output MEMS Accelerometer
PDF  71 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADXL366 Datasheet(HTML) 42 Page - Analog Devices

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Data Sheet
ADXL366
REGISTER DETAILS
analog.com
Rev. 0 | 42 of 71
Table 40. Bit Descriptions for THRESH_INACT_H
Bits
Bit Name
Settings
Description
Reset
Access
7
RESERVED
Reserved.
0x0
R
[6:0]
THRESH_INACT[12:6]
To detect inactivity, the absolute value of the 14-bit acceleration data is compared with
the 13-bit (unsigned) THRESH_INACT value, inactivity = acceleration < acceleration. See
the Motion Detection section for more information. The term, THRESH_INACT, refers to a
13-bit unsigned value comprised of the THRESH_INACT_L registers, which holds its six
LSBs (THRESH_INACT[5:0]) and the THRESH_INACT_H register, which holds its seven
MSBs (THRESH_INACT[12:6]).
0x0
R/W
THRESHOLD INACTIVITY BITS[5:0] REGISTER
Address: 0x24, Reset: 0x00, Name: THRESH_INACT_L
Table 41. Bit Descriptions for THRESH_INACT_L
Bits
Bit Name
Settings
Description
Reset
Access
[7:2]
THRESH_INACT[5:0]
To detect inactivity, the absolute value of the 14-bit acceleration data is compared with the
13-bit (unsigned) THRESH_INACT value, inactivity = acceleration < acceleration. See the
Motion Detection section for more information. The term, THRESH_INACT, refers to a 13-bit
unsigned value comprised of the THRESH_INACT_L register, which holds its six LSBs
(THRESH_INACT[5:0]) and the THRESH_INACT_H register, which holds its seven MSBs
(THRESH_INACT[12:6]).
0x0
R/W
[1:0]
RESERVED
Reserved.
0x0
R
TIMED INACTIVITY BITS[15:8] REGISTER
Address: 0x25, Reset: 0x00, Name: TIME_INACT_H
Table 42. Bit Descriptions for TIME_INACT_H
Bits
Bit Name
Settings
Description
Reset
Access
[7:0]
TIME_INACT[15:8]
The 16-bit value in these registers sets the number of consecutive samples that must have all
axes lower than the inactivity threshold (set by THRESH_INACT) for an inactivity event to be
detected.
0x0
R/W
TIMED INACTIVITY BITS[7:0] REGISTER
Address: 0x26, Reset: 0x00, Name: TIME_INACT_L
Table 43. Bit Descriptions for TIME_INACT_L
Bits
Bit Name
Settings
Description
Reset
Access
[7:0]
TIME_INACT[7:0]
The 16-bit value in these registers sets the number of consecutive samples that must have all
axes lower than the inactivity threshold (set by THRESH_INACT) for an inactivity event to be
detected.
0x0
R/W



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