ADXL366 datasheet(28/71 Pages) AD

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Data Sheet

ADXL366

ADDITIONAL FEATURES

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EXTERNAL CLOCK

The ADXL366 has a built-in 102.4kHz (typical) clock that, by de-

fault, serves as the time base for internal operations.

The ODR and bandwidth scale proportionally with the clock. The

ADXL366 provides a discrete number of options for the ODR, such

as 100Hz, 50Hz, and 25Hz, in factors of 2. To achieve data rates

other than those provided, an external clock can be used at the

appropriate clock frequency. The output data rate scales with the

clock frequency, as shown in Equation 5.

ODRACTUAL = ODRSELECTED × f102.4kHz (5)

For example, to achieve an 80Hz ODR, select the 100Hz ODR

setting and provide a clock frequency that is 80% of nominal, or

81.92kHz.

The ADXL366 can operate with external clock frequencies ranging

from the nominal 102.4kHz down to 51.2kHz to allow the user to

achieve any desired output data rate.

Alternatively, an external clock can be used to improve clock fre-

quency accuracy. To achieve tighter tolerances, a more accurate

clock can be provided externally.

Power consumption also scales with clock frequency. Higher clock

rates increase power consumption. Figure 54 shows how power

consumption varies with clock rate.

Note that the external clock must only be configured when in stand-

by mode and be running before the measurement mode command

is issued.

Figure 54. Current Consumption vs. External Clock Rate

EXTERNAL TRIGGER

For applications that require a precisely timed acceleration meas-

urement, the ADXL366 features an option to synchronize accelera-

tion sampling to an external trigger. Note that synchronized data

sampling (external trigger) is not supported in the ADXL366 when in

wake-up mode.

Refer to the Using External Trigger section for more information.

SELF TEST

The ADXL366 incorporates a self test feature that effectively tests

its mechanical and electronic systems simultaneously. When the

self test function is invoked, an electrostatic force is applied to the

mechanical sensor. This electrostatic force moves the mechanical

sensing element in the same manner as acceleration, and it is

additive to the acceleration experienced by the device. This added

electrostatic force results in an output change only on x-axis chan-

nel. Any reading made on the y-axis channel and z-axis channel

during self test is invalid.

USER REGISTER PROTECTION

The ADXL366 includes user register protection for single event up-

sets (SEUs). An SEU is a change of state caused by ions or elec-

tromagnetic radiation striking a sensitive node in a microelectronic

device. The state change is a result of the free charge created

by ionization in or close to an important node of a logic element

(for example, a memory bit). The SEU, itself, is not considered

permanently damaging to transistor or circuit functionality, but it

can create erroneous register values. The ADXL366 registers that

are protected from SEU are Register 0x00 to Register 0x43 with a

242-bit checker.

SEU protection is implemented via a 99-bit error correcting (Ham-

ming-type) code that detects both single-bit and double-bit errors.

The check bits are recomputed any time a write to any of the

protected registers occurs. At any time, if the stored version of

the check bits is not in agreement with the current check bit

calculation, the ERR_USER_REGS status bit (Bit 7) is set in the

status registers (Register 0x0B and Register 0x44).

The ERR_USER_REGS bit in the status registers is set on power-

up prior to device configuration. This bit clears on the first register

write to that device.

ADXL366 Datasheet(PDF) 28 Page - Analog Devices

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