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HD64F36049 Datasheet(PDF) 362 Page - Renesas Technology Corp

Part # HD64F36049
Description  Renesas 16-Bit Single-Chip Microcomputer H8 Family / H8/300H Tiny Series
PDF  562 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD64F36049 Datasheet(HTML) 362 Page - Renesas Technology Corp

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Section 17 Serial Communication Interface 3 (SCI3)
Rev. 3.00 Mar. 15, 2006 Page 330 of 526
REJ09B0060-0300
Reception cannot be resumed while a receive error flag is set to 1. Accordingly, clear the OER,
FER, PER, and RDRF bits to 0 before resuming reception. Figure 17.13 shows a sample flow
chart for serial data reception.
Yes
<End>
No
Start reception
[1]
[4]
No
Yes
Read RDRF flag in SSR
[2]
[3]
Clear RE bit in SCR3 to 0
Error processing
(Continued below)
Read receive data in RDR
Yes
No
OER = 1
RDRF = 1
All data received?
Read OER flag in SSR
<End>
Error processing
Overrun error processing
Clear OER flag in SSR to 0
[4]
[1]
Read the OER flag in SSR to determine if
there is an error. If an overrun error has
occurred, execute overrun error processing.
[2]
Read SSR and check that the RDRF flag is
set to 1, then read the receive data in RDR.
When data is read from RDR, the RDRF
flag is automatically cleared to 0.
[3]
To continue serial reception, before the
MSB (bit 7) of the current frame is received,
reading the RDRF flag and reading RDR
should be finished. When data is read from
RDR, the RDRF flag is automatically
cleared to 0.
[4]
If an overrun error occurs, read the OER
flag in SSR, and after performing the
appropriate error processing, clear the OER
flag to 0. Reception cannot be resumed if
the OER flag is set to 1.
Figure 17.13 Sample Serial Reception Flowchart (Clocked Synchronous Mode)



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