HD64F36049 datasheet(286/562 Pages) RENESAS

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Section 14 Timer Z

Rev. 3.00 Mar. 15, 2006 Page 254 of 526

REJ09B0060-0300

14.4.6

Reset Synchronous PWM Mode

Three normal- and counter-phase PWM waveforms are output by combining channels 0 and 1 that

one of changing points of waveforms will be common.

In reset synchronous PWM mode, the FTIOB0 to FTIOD0 and FTIOA1 to FTIOD1 pins become

PWM-output pins automatically. TCNT_0 performs an increment operation. Tables 14.4 and 14.5

show the PWM-output pins used and the register settings, respectively.

Figure 14.26 shows the example of reset synchronous PWM mode setting procedure.

Table 14.4

Output Pins in Reset Synchronous PWM Mode

Channel

Pin Name

Input/Output

Pin Function

FTIOC0

Output

Toggle output in synchronous with PWM cycle

FTIOB0

Output

PWM output 1

FTIOD0

Output

PWM output 1 (counter-phase waveform of PWM

output 1)

FTIOA1

Output

PWM output 2

FTIOC1

Output

PWM output 2 (counter-phase waveform of PWM

output 2)

FTIOB1

Output

PWM output 3

FTIOD1

Output

PWM output 3 (counter-phase waveform of PWM

output 3)

Table 14.5

Description

TCNT_0

Initial setting of H'0000

TCNT_1

Not used (independently operates)

GRA_0

Sets counter cycle of TCNT_0

GRB_0

Set a changing point of the PWM waveform output from pins FTIOB0 and FTIOD0.

GRA_1

Set a changing point of the PWM waveform output from pins FTIOA1 and FTIOC1.

GRB_1

Set a changing point of the PWM waveform output from pins FTIOB1 and FTIOD1.

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