HD64F36024 datasheet(98/384 Pages) RENESAS

98 / 384 page

Section 6 Power-Down Modes

Rev. 4.00 Sep. 23, 2005 Page 72 of 354

REJ09B0025-0400

6.1.3

Module Standby Control Register 1 (MSTCR1)

MSTCR1 allows the on-chip peripheral modules to enter a standby state in module units.

Bit

Bit Name

Initial

Value

R/W

Description

7, 6



All 0



Reserved

These bits are always read as 0.

MSTS3

R/W

SCI3 Module Standby

SCI3 enters standby mode when this bit is set to 1.

MSTAD

R/W

A/D Converter Module Standby

A/D converter enters standby mode when this bit is set to

MSTWD

R/W

Watchdog Timer Module Standby

Watchdog timer enters standby mode when this bit is set

to 1.When the internal oscillator is selected for the

watchdog timer clock, the watchdog timer operates

regardless of the setting of this bit.

MSTTW

R/W

Timer W Module Standby

Timer W enters standby mode when this bit is set to 1.

MSTTV

R/W

Timer V Module Standby

Timer V enters standby mode when this bit is set to 1.



Reserved

This bit is always read as 0.

6.1.4

Module Standby Control Register 2 (MSTCR2)

MSTCR2 allows the on-chip peripheral modules to enter a standby state in module units.

Bit

Bit Name

Initial

Value

R/W

Description

MSTS3_2

R/W

SCI3_2 Module Standby

SCI3_2 enters standby mode when this bit is set to1.

6 to 0



All 0



Reserved

These bits are always read as 0.

HD64F36024 Datasheet(PDF) 98 Page - Renesas Technology Corp

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