HD64F36024 datasheet(14/384 Pages) RENESAS

14 / 384 page

Rev. 4.00 Sep. 23, 2005 Page xiv of xxvi

13.4.2 SCI3 Initialization................................................................................................. 193

13.4.3 Data Transmission ................................................................................................ 194

13.4.4 Serial Data Reception ........................................................................................... 196

13.5

Operation in Clocked Synchronous Mode ......................................................................... 200

13.5.1 Clock..................................................................................................................... 200

13.5.2 SCI3 Initialization................................................................................................. 201

13.5.3 Serial Data Transmission ...................................................................................... 201

13.5.4 Serial Data Reception (Clocked Synchronous Mode) .......................................... 203

13.5.5 Simultaneous Serial Data Transmission and Reception........................................ 205

13.6

Multiprocessor Communication Function.......................................................................... 207

13.6.1 Multiprocessor Serial Data Transmission ............................................................. 208

13.6.2 Multiprocessor Serial Data Reception .................................................................. 210

13.7

Interrupts............................................................................................................................ 214

13.8

Usage Notes ....................................................................................................................... 215

13.8.1 Break Detection and Processing ........................................................................... 215

13.8.2 Mark State and Break Sending ............................................................................. 215

13.8.3 Receive Error Flags and Transmit Operations

(Clocked Synchronous Mode Only) ..................................................................... 215

13.8.4 Receive Data Sampling Timing and Reception Margin in Asynchronous

Mode..................................................................................................................... 216

Section 14 A/D Converter ................................................................................. 217

14.1

Features.............................................................................................................................. 217

14.2

Input/Output Pins ...............................................................................................................219

14.3

Register Description .......................................................................................................... 220

14.3.1 A/D Data Registers A to D (ADDRA to ADDRD) .............................................. 220

14.3.2 A/D Control/Status Register (ADCSR) ................................................................ 221

14.3.3 A/D Control Register (ADCR) ............................................................................. 222

14.4

Operation ........................................................................................................................... 223

14.4.1 Single Mode.......................................................................................................... 223

14.4.2 Scan Mode ............................................................................................................ 223

14.4.3 Input Sampling and A/D Conversion Time .......................................................... 224

14.4.4 External Trigger Input Timing.............................................................................. 225

14.5

A/D Conversion Accuracy Definitions .............................................................................. 226

14.6

Usage Notes ....................................................................................................................... 228

14.6.1 Permissible Signal Source Impedance .................................................................. 228

14.6.2 Influences on Absolute Accuracy ......................................................................... 228

HD64F36024 Datasheet(PDF) 14 Page - Renesas Technology Corp

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