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AFE8405 Datasheet(PDF) 39 Page - Texas Instruments |
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AFE8405 Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 152 page ![]() B0112-01 lfsr19 lfsr16 lfsr15 lfsr14 lfsr13 lfsr12 lfsr11 lfsr22 lfsr22 lfsr22 lfsr22 lfsr22 lfsr22 lfsr20 lfsr22 lfsr18 lfsr17 lfsr16 lfsr15 lfsr14 lfsr13 lfsr12 lfsr11 lfsr10 dout9 dout15 dout14 dout13 dout12 dout11 dout10 dout8 dout7 dout6 dout5 dout4 dout3 dout2 dout1 dout0 AFE8405 14-BIT, 85-MSPS, SINGLE-ADC, 8-CHANNEL WIDEBAND RECEIVER www.ti.com SLWS212 – OCTOBER 2008 The 23-bit LFSR output signal if used to create a 16-bit dout(15:0) test signal using XOR combinations of the LFSR bits. Figure 7-8. Mapping of LFSR Values to Output Bits To enable the test signal generator, the slf_tst_ena control bit is set. The rxin_a/b/c/d signals are then replaced by the four generator output streams. To use this test signal generator as a signal source for self-test, the user must also set the adc_fifo_bypass control bit. Setting the adc_fifo_bypass control bit causes the adcclk_a/b/c/d input clocks to be internally replaced with rxclk/N, where N is programmed with the rate_sel(1:0) control bits to {1, 2, 4, or 8}. The test signal generators can also output a programmable constant value. All four test signal generators output the same programmable constant value. Submit Documentation Feedback RECEIVE DIGITAL SIGNAL PROCESSING 39 |
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