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AFE8405 Datasheet(PDF) 3 Page - Texas Instruments

Part # AFE8405
Description  14-BIT, 85-MSPS, SINGLE-ADC, 8-CHANNEL WIDEBAND RECEIVER
PDF  152 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AFE8405 Datasheet(HTML) 3 Page - Texas Instruments

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General Description
B0104-02
refpa
refma
Internal
Reference
S&H
14-Bit
Pipelined
ADCCore
Dual14-Bit85-MSPS ADC
Digital
Error
Correction
Output
Control
TimingCircuitry
inpa
inma
clkpa
clkma
trst_n
tck
tdi
tms
JTAG
tdo
rx_synca–
d
rx_sync
reset_n
16
6
ControlandSync
d(15:0)
a(5:0)
rd_n
wr_n
ce_n
interrrupt
rx_sysnc_out
da(13:0)
clkouta
16
16
DigitalReceive
DataPorts
dvga_a
dvga_b dvga_d
dvga_c
rxin_a
adcclk_a
adcclk_b
rxin_b
rxin_c
adcclk_c
rxin_d
adcclk_d
ReceiveInput
Interface
Power
Measurements
andWideband
AGC
6
6
6
6
rxclk
DDC0
2CDMA2000-1X,
2 TD-SCMA or1UMTS
DDC2
2CDMA2000-1X,
2 TD-SCMA or1UMTS
DDC3
2CDMA2000-1X,
2 TD-SCMA or1UMTS
DDC4
2CDMA2000-1X,
2 TD-SCMA or1UMTS
DDC5
2CDMA2000-1X,
2 TD-SCMA or1UMTS
DDC6
2CDMA2000-1X,
2 TD-SCMA or1UMTS
DDC7
2CDMA2000-1X,
2 TD-SCMA or1UMTS
DDC1
2CDMA2000-1X,
2 TD-SCMA or1UMTS
I
I
I
I
I
I
I
I
Q
Q
Q
Q
Q
Q
Q
Q
sync
sync
sync
sync
sync
sync
sync
sync
Output
Format
Parallel
or
Serial
32
8
rxout_X_X
rx_sync_out_X
rxclk_out
AFE8405
14-BIT, 85-MSPS, SINGLE-ADC, 8-CHANNEL WIDEBAND RECEIVER
www.ti.com
SLWS212 – OCTOBER 2008
The AFE8405 is a multichannel communications signal processor that provides analog-to-digital
conversion and digital downconversion optimized for cellular base transceiver systems. The device
supports UMTS, CDMA-1X, and TD-SCDMA air-interface cellular standards.
The AFE8405 provides up to 8 UMTS digital downconverter channels (DDC), 16 CDMA DDCs or 16
TD-SCDMA DDCs. The DDC channels are independent and operate simultaneously.
The AFE8405 DDCs have three input ports; one is hardwired to the internal 14-bit analog-to-digital
converter (rxin_a) and two are 16-bit digital inputs (rxin_c, rxin_d). Each DDC channel can be
programmed to accept data from any one of the three input ports; rxin_b is not used.
Figure 2-1. Functional Block Diagram
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General Description
3



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