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AFE8405 Datasheet(PDF) 32 Page - Texas Instruments |
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AFE8405 Datasheet(HTML) 32 Page - Texas Instruments |
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32 / 152 page ![]() 7.1.2 Receive Input Power Meters B0107-01 Fromrxin_aFIFOOutput Fromrxin_cFIFOOutput Fromrxin_bFIFOOutput Fromrxin_dFIFOOutput pmeter_iq0 pmeter_iq2 pmeter_iq1 pmeter_iq3 I I I I Q Q Q Q PowerMeter0Results PowerMeter2Results PowerMeter1Results PowerMeter3Results PowerMeter0 PowerMeter2 PowerMeter1 PowerMeter3 AFE8405 14-BIT, 85-MSPS, SINGLE-ADC, 8-CHANNEL WIDEBAND RECEIVER SLWS212 – OCTOBER 2008 www.ti.com PROGRAMMING VARIABLE DESCRIPTION adc_fifo_bypass When set, bypasses the input FIFOs and input data is latched directly using the rxclk. When cleared, input data is latched using the adcclk_a/b/c/d inputs. ssel_adc_fifo(2:0) Selects the sync source for the FIFO state machines. This sync signal initializes the FIFO input and output pointers. rate_sel(1:0) This selects the FIFO input and output rate; {rxclk, rxclk/2, rxclk/4 or rxclk/8}. For example, with rxclk at 153.6 MHz, set rate_sel to 0, 1, 2, or 3, respectively, for adcclk_a/b/c/d 153.6, 76.8, 38.4, or 19.2 MHz. Must be set the same as DDCCONFIG1 register ch_rate_sel(1:0). adc_fifo_strap_ab When set, the rxin_a and rxin_b FIFO input and output pointers are synchronized to support complex input signals. (Note: rxin_b is not used.) adc_fifo_strap_cd When set, the rxin_c and rxin_d FIFO input and output pointers are synchronized to support complex input signals. Figure 7-2. Receive Input Power Meters Four receive input RMS power meters are provided by design. For real inputs, three power meters (power meter 0/2/3) can be used to measure the RMS power of the combined carriers in each of the three input signals from rxin_a/c/d (the Q input is held at zero). For complex inputs from rxin_c and rxin_d, one power meter can be use to measure the combined complex power and the other can be disabled (rxin_b is not used in the AFE8405). RECEIVE DIGITAL SIGNAL PROCESSING 32 Submit Documentation Feedback |
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