AFE8405 datasheet(67/152 Pages) TI

67 / 152 page

AFE8405

14-BIT, 85-MSPS, SINGLE-ADC, 8-CHANNEL WIDEBAND RECEIVER

www.ti.com

SLWS212 – OCTOBER 2008

The AGC noise once the AGC has converged is a random error of amplitude 2–D relative to the RMS

signal level. This means that the error level is –6

× D dB below the signal RMS level. At D = 10 (–60 dB)

the error is negligible. The plot of Figure 7-29 shows the AGC response for vales of D ranging from 3 to

18. Error dB represents the distance the signal level is from the desired target threshold.

The AGC is also subject to user-specified upper and lower adjustment limits. The AGC stops incrementing

the gain if the adjustment exceeds Amax. It stops decrementing the gain if the adjustment is less than

Amin.

The input data is received with a valid flag that is high when a valid sample is received. For complex data,

the I and Q samples are on the same data input line and are not treated independently. An adjustment is

made for the magnitude of the I sample, and then another adjustment is made for the Q sample.

The AGC operates on UMTS and CDMA data. When in UMTS mode, the I and Q data are each used to

produce the AGC level. There is no separate I path gain and Q path gain. When in CDMA mode there are

separate gain levels for the signal and diversity I and Q data. The I and Q for A (or the signal) pair is

calculated and then the I' and Q' for the B (or diversity) pair is calculated.

There is a freeze mode for holding the accumulator at its current level. This puts the AGC in a hold mode

using the user-programmed gain along with the current gain_adjust value. To use only the

user-programmed gain value as the gain, set the freeze bit and then clear the accumulator. When using

the freeze bit, the full 25-bit output is sent out of the AGC block to support transferring up to 25 bits when

the AGC is disabled.

For TDD applications, freeze mode can be controlled using a sync source. This allows rxsync_a/b/c/d to

be assigned as an AGC hold signal to keep the AGC from responding during the transmit interval and run

during the receive interval. The freeze register bit is logically ORed with the freeze sync source.

The current AGC gain and state can also be optionally output with the DDCs I and Q output data by

setting the gain_mon variable. When in this mode, the top 14 bits of the current AGC gain word are

appended to the 8-bit AGC-modified I and Q output data.

Output

Bits(17:10)

Bits(9:4)

Bits(3:2)

Bits(1:0)

I output data

Gain(23:16)

Q output data

Gain(15:10)

AGC State(1:0)

PROGRAMMING

VARIABLE

DESCRIPTION

agc_dblw(3:0)

Below threshold gain. Sets the value of gain step size Dblw (data x current gain below threshold). Ranges from

3 to 18, and maps to a 4-bit field. For example: 3 = 0000, 4 = 0001,

… 18 = 1111

agc_dabv(3:0)

Above threshold gain. Sets the value of gain step size Dabv (data x current gain above threshold). Ranges

from 3 to 18, and maps to a 4-bit field. For example: 3 = 0000, 4 = 0001,

… 18 = 1111

agc_dzro(3:0)

Zero signal gain. Sets the value of gain step size Dzro (data x current gain consistently zero). Ranges from 3 to

18, and maps to a 4-bit field. For example: 3 = 0000, 4 = 0001,

… 18 = 1111

agc_dsat (3:0)

Saturated signal gain. Sets the value of gain step size Dsat (data x current gain consistently saturated).

Ranges from 3 to 18, and maps to a 4-bit field. For example: 3 = 0000, 4 = 0001,

… 18 = 1111

agc_zero_msk(3:0)

Masks the lower 4 bits of signal data so as to be considered zeros.

agc_md(3:0)

AGC rounding. 0000 = 18 bits out, 1111 = 3 bits out.

agc_thresh(7:0)

AGC threshold. Compared with magnitude of 8 bits of input

× gain.

agc_rnd_disable

AGC rounding is disabled when this bit is set.

agc_freeze

The AGC gain adjustment updates are disabled when set.

agc_clear

The AGC gain adjustment accumulator is cleared when set.

agc_gaina(23:0)

24-bit gain word for DDC A

agc_gainb(23:0)

24-bit gain word for DDC B (in CDMA mode)

agc_zero_cnt(3:0)

When the AGC output (input

× gain) is zero-value this number of times, the shift value is changed to

agc_dzero.

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