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SH7101 Datasheet(PDF) 203 Page - Renesas Technology Corp |
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SH7101 Datasheet(HTML) 203 Page - Renesas Technology Corp |
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203 / 486 page  8. Multi-Function Timer Pulse Unit (MTU) Rev.2.00 Sep. 27, 2007 Page 169 of 448 REJ09B0394-0200 TGRC_3 TDDR TCNT_3 TGRD_3 TGRD_4 TGRC_4 TCNTS TCNT_4 TGRA_3 TCDR TCBR Comparator Comparator Match signal Match signal PWM cycle output PWM output 1 PWM output 2 PWM output 3 PWM output 4 PWM output 5 PWM output 6 POE0 POE1 POE2 POE3 External cutoff input External cutoff interrupt : Registers that can always be read or written from the CPU : Registers that cannot be read or written from the CPU (except for TCNTS, which can only be read) : Registers that can be read or written from the CPU (but for which access disabling can be set by the bus controller) Figure 8.32 Block Diagram of Channels 3 and 4 in Complementary PWM Mode |
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