SH7101 datasheet(313/486 Pages) RENESAS

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10. Serial Communication Interface (SCI)

Rev.2.00 Sep. 27, 2007 Page 279 of 448

REJ09B0394-0200

10.2

Input/Output Pins

Table 10.1 shows the SCI pin configuration.

Table 10.1

Pin Configuration

Channel

Pin Name*

I/O

Function

SCK2

I/O

SCI2 clock input/output

RxD2

Input

SCI2 receive data input

TxD2

Output

SCI2 transmit data output

SCK3

I/O

SCI3 clock input/output

RxD3

Input

SCI3 receive data input

TxD3

Output

SCI3 transmit data output

Note:

Pin names SCK, RxD, and TxD are used in the text for all channels, omitting the

channel designation.

10.3

The SCI has the following registers for each channel. For details on register addresses and register

states during each processing, refer to section 18, List of Registers.

Channel 2

• Serial Mode Register_2 (SMR_2)

• Bit Rate Register_2 (BRR_2)

• Serial Control Register_2 (SCR_2)

• Transmit Data Register_2 (TDR_2)

• Serial Status Register_2 (SSR_2)

• Receive Data Register_2 (RDR_2)

• Serial Direction Control Register_2 (SDCR_2)

Channel 3

• Serial Mode Register_3 (SMR_3)

• Bit Rate Register_3 (BRR_3)

• Serial Control Register_3 (SCR_3)

• Transmit Data Register_3 (TDR_3)

• Serial Status Register_3 (SSR_3)

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