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SH7101 Datasheet(PDF) 327 Page - Renesas Technology Corp |
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SH7101 Datasheet(HTML) 327 Page - Renesas Technology Corp |
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327 / 486 page ![]() 10. Serial Communication Interface (SCI) Rev.2.00 Sep. 27, 2007 Page 293 of 448 REJ09B0394-0200 Table 10.6 BRR Settings for Various Bit Rates (Clocked Synchronous Mode) Operating Frequency P φ (MHz) 4 6 8 10 12 Logical Bit Rate (bit/s) n N n N n N n N n N 250 2 124 2 187 2 249 ⎯ ⎯ ⎯ ⎯ 500 1 249 ⎯ ⎯ 2 124 2 155 2 187 1000 1 124 1 187 1 249 ⎯ ⎯ ⎯ ⎯ 2500 1 49 1 74 1 99 1 124 1 149 5000 1 24 ⎯ ⎯ 1 49 ⎯ ⎯ 1 74 10000 0 99 0 149 1 24 0 249 ⎯ ⎯ 25000 0 39 0 59 1 9 0 99 1 14 50000 0 19 0 29 1 4 0 49 0 59 100000 0 9 0 14 0 19 0 24 0 29 250000 0 3 0 5 0 7 0 9 0 11 500000 0 1 0 2 0 3 0 4 0 5 1000000 0 0 ⎯ ⎯ 0 1 ⎯ ⎯ 0 2 2500000 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 0 0 ⎯ ⎯ 5000000 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Operating Frequency P φ (MHz) 14 16 18 20 22 Logical Bit Rate (bit/s) n N n N n N n N n N 250 3 108 3 124 3 140 3 155 3 171 500 2 218 2 249 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 1000 2 108 2 124 2 140 2 155 3 42 2500 1 174 2 49 1 224 1 249 ⎯ ⎯ 5000 ⎯ ⎯ 2 24 1 112 1 124 1 137 10000 ⎯ ⎯ 1 49 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 25000 0 139 1 19 0 179 1 24 0 219 50000 0 69 1 9 0 89 0 99 0 109 100000 0 34 1 4 0 44 0 49 0 54 250000 0 13 1 1 0 17 0 19 0 21 500000 0 6 1 0 0 8 0 9 0 10 1000000 ⎯ ⎯ 0 3 ⎯ ⎯ 0 4 ⎯ ⎯ 2500000 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 0 1 ⎯ ⎯ 5000000 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 0 0 ⎯ ⎯ |
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